Dwarf Fortress Wiki - User contributions [en]

v0.31 Talk:Embark

2010-07-08T22:33:10Z

Jjdorf:

* could not replicate the "double fish crash"
Never embark without elves or goblins. Elves bring superawesome animals ( I made a giant forest spider which is like the giant cave spider just in a forest and the elves brought me three of them in the second year) and various plants like whip vine and sunberries. And goblins, well, they make Fun.--[[User:Niggy|Niggy]] 19:37, 9 June 2010 (UTC)

==Play Now, Fisherdwarf==
I just did a "Play Now!", and my Fisherdwarf does NOT have any social skills (just Novice Fisherdwarf), but he was still assigned as the Expedition Leader and I can assign labors just fine. Also, it's highly likely that the listed Dabbling skills were learned immediately '''after''' embarking, while said dwarf was talking to the others. --[[User:Quietust|Quietust]] 17:36, 9 April 2010 (UTC)

==Play Now, worldgen titles?==
It's suggested that the initial 7 dwarves can come from worldgen. Some actual proof of this claim (e.g. savegame) would be nice. --[[User:Quietust|Quietust]] 17:40, 9 April 2010 (UTC)

==Verification==
"Fish are double-listed in the embark items screen. If you choose both fish the game will crash.Verify"

:This is false; I've embarked with two separate barrels of cave lobsters twice now. I'm deleting this from the article. --[[User:Zombiejustice|Zombiejustice]] 18:07, 9 April 2010 (UTC)

::Ya that's BS.--[[User:Mrdudeguy|Mrdudeguy]] 18:22, 9 April 2010 (UTC)

::Hmm, I added that because it was on the "Known bugs" page. I'll go remove it from that then, as it seems this is false.

== No trade ==

Some of the civilizations in my embark screen have a "no trade" tag. What does it mean? --[[Special:Contributions/151.49.233.194|151.49.233.194]] 13:50, 15 May 2010 (UTC)

* they won't send any caravan --[[Special:Contributions/94.217.127.76|94.217.127.76]] 14:01, 25 May 2010 (UTC)

==make up your mind..==
* "'''Don't Really Need That''' - unless you have tailored your embark for metal production quick and early, '''''an anvil is unnecessary''''' and the 100 points you get from refunding it can be better spent on skills or additional foodstuffs"
* "'''Yes, I Do Need That''' - '''''never leave without an anvil''''', since nothing guarantees the first caravan will even have one for sale.
which one is it...? do, or don't?--[[User:DJ Devil|DJ Devil]] 14:00, 20 June 2010 (UTC)

==Size of embark squares==
Not sure if this is noted anywhere on the wiki, but I think it might be useful to know that a single square on embark equates to a 48 by 48 square in fortress mode. Useful if you need to know a minimum size embark for that megaproject you're cooking up. [[User:Jjdorf|Jjdorf]] 22:33, 8 July 2010 (UTC)

v0.31 Talk:Pre-Toggled Mechanical Logic

2010-05-03T15:10:40Z

Jjdorf:

Did you test any of this before writing this up and linking to it from the mechanical logic page? This doesn't work the way you seem to think. Once your inputs have toggled once, your pre-toggled gears will revert back to normal and you will, for instance, instead of a NAND gate, have an OR gate. When an object sends a state, it sends an OFF/ON signal corresponding to the input's state. It does not send a TOGGLE-STATE signal. Here, I built one of them and tested it: Your NAND gate is actually an OR gate, because pre-toggling doesn't do what you think it does. http://mkv25.net/dfma/movie-2151-pre-togglednandbecominganorgate --[[User:SL|SL]] 20:56, 2 May 2010 (UTC)
:Actually, when you're dealing with gear assemblies, levers '''DO''' send a "toggle" signal. However, it's also apparent that you did the test wrong - the first design guideline states that "Levers and pressure plates should be linked to a gear assembly in the ''on'' state. For reference, a lever is ''off'' when built.", and your levers were linked while in the "off" state. --[[User:Quietust|Quietust]] 21:20, 2 May 2010 (UTC)
::There's also the fact that the stuff in this article doesn't really work when dealing with pressure plates, since pressure plates can't easily be linked when "on". --[[User:Quietust|Quietust]] 21:22, 2 May 2010 (UTC)
:::I realized a minute ago (and edited the text in my movie) that they were toggling, as the pre-toggling lever switched the gears to OFF and the input levers then switched them back to ON. It's just that the gate seems to be an OR gate instead of a NAND gate when linked up the way I did it (I did miss the part about toggling the levers to ON before linking them). Now why would you have to have your levers ON instead of OFF? It's not so useful if you can't use pressure plates with it. Surely the gates could be designed to accomodate default lever and pressure plate states, hell, switching the OR and NAND gate designs and dropping the levers-ON-before-linking requirement would likely make those work with pressure plates. --[[User:SL|SL]] 21:31, 2 May 2010 (UTC)
::::In reality, the "pre-toggling" would '''only''' be necessary for pressure plates, and all of the "pre-toggled" versus "non-toggled" stuff should be switched around (i.e. stuff currently labeled "pre-toggled" should start enabled and "non-toggled" should start disabled), and pre-toggling via a lever should '''only''' be used for pressure plates - for levers, all you need to do is link the lever when it's in a specific position. --[[User:Quietust|Quietust]] 22:37, 2 May 2010 (UTC)
:::::I have tested all of these designs personally. Pre-toggling is needed if you want to avoid the use of "load gear chains" for things like NAND, NOR, XOR and NXOR. As for pressure plates, re-think your designs to have the plate on when 0-3/7 water. It is doable, and I will be adding known functional water preserving memory and fluid buffer/rotation sensor designs in time. [[User:Jjdorf|Jjdorf]] 05:03, 3 May 2010 (UTC)
::::::There's just one small issue with using "inverse" pressure plates - while pressure plates go from "untriggered" to "triggered" instantly, they take 100 ticks to go back to "untriggered". Depending on the system being designed, it might be more desirable to have the delay occur on deactivation rather than on activation. --[[User:Quietust|Quietust]] 12:49, 3 May 2010 (UTC)
:::::::True, but that limitation will occur regardless of what water levels you use. If the plate "semantics" are inverted, the designer will have to determine the new correct logical truth table and adjust their gear assembly design accordingly by inverting the pre-toggled state of every gear assembly linked to the plate. Since these designs were created with the intented use of a dwarven computer, the design guidelines were set forth as they are now. [[User:Jjdorf|Jjdorf]] 15:10, 3 May 2010 (UTC)

v0.31 Talk:Pre-Toggled Mechanical Logic

2010-05-03T05:03:25Z

Jjdorf:

v0.31:Pre-Toggled Mechanical Logic

2010-04-28T04:20:06Z

Jjdorf: Minor-ish updates to PTML.

{{av}}
{{elven}}
Recently some research on mechanical logic offered a new viewpoint of dealing with the limitations of this variety of logic. By including a concept called pre-toggling, one can construct nearly any conceivable logic circuit, with surmountable exceptions. From this, Pre-Toggled Mechanical Logic (PTML) was born. Due to the nature of gear assemblies, circuitry using this method can be exceptionally fast for certain purposes, and can be made 100% fluid conserving in all cases, allowing it to be isolated from an infinite water supply.
=Design Guidelines=
There are a few guidelines for working with PTML circuits.
* Levers and pressure plates should be linked to a gear assembly in the ''on'' state. For reference, a lever is off when built.
* A gear may be designated as undriven, non-toggled, or pre-toggled.
** Undriven gears are never linked to. They merely transfer what power is available to them.
** Non-toggled gears are linked to by a lever or pressure plate, and left alone. They transfer power when their truth state is true.
** Pre-toggled gears are linked to by a lever or pressure plate, then pre-toggled. To pre-toggle a gear, you build a lever, link it to the gear to pre-toggle, then flip the lever and dismantle it. As such, pre-toggled gears cost an extra mechanism. Pre-toggled gears flip the logical truth state of their inputs.
* Two gears are considered directly connected if they are either adjacent, above one another without an intervening floor, or if they are separated by only axles and/or undriven gears.
* Two driven connected gears form an AND gate. Power can flow through an AND gate only if both driven gears are in the true truth state.
* A single gear connected to two or more driven input gears forms an OR gate. Power will flow through this gear if at least one of the driven source gears is in the true truth state. If the gear is undriven, it forms a simple OR gate. If, however, it is driven, its input is ANDed with whatever the output of the OR expression is.
* A single gear can be driven by multiple inputs to form an XOR or NXOR gate. For even numbers of inputs, the gear must be pre-toggled to form an XOR gate, non-toggled to form an NXOR gate. For odd numbers of inputs, the gear must be non-toggled to form an XOR gate, pre-toggled to form an NXOR gate. Power will flow through this gear only if it is in the true truth state.
* Two connected driven gears, both having identical input links, with one being non-toggled, and the other being pre-toggled, are called ''out-of-phase''. Out-of-phase gears will never transfer power through their connections.
* Determining the qualities of a PTML circuit can be done on paper or in a spreadsheet. Truth formulas for each gear can be devised to determine whether they are engaged or disengaged. This need only be done for driven gears. Power can only flow through engaged gears, i.e. gears whose truth state is true. An output undriven gear will have power if an orthogonal line can be drawn from the power through any series of engaged gears. This does not require the circuit to be built in game to verify that it works.
* Hybrid circuitry exists to allow the output of a gear train to be used to toggle other gears, or to open or close mechanically linked buildings, such as drawbridges, doors, floodgates, etc. This hybrid circuitry uses water and pressure plates as a '''rotation sensor'''. A design for a water preserving sensor exists, as does a design for a water preserving fluid memory cell.
=Diagram conventions=
In diagrams, gear assemblies are typically given a letter to represent them. If uppercase, the gear is non-toggled. If lowercase, the gear is pre-toggled.
=Sample Logic Chains=
==OR Gate==
PA
BO
Power, supplied at the gear labeled P, will flow through either gear A or gear B to gear O, if at least one of the signals is on.
==AND Gate==
PABO
Power, supplied at the gear labeled P, will flow through gear A and gear B to gear O, if both of the signals are on.
==NAND Gate==
Pa
bO
Power, supplied at the gear labeled P, will flow through gear a or gear b to gear O, if either of the signals is off.
==NOR Gate==
PabO
Power, supplied at the gear labeled P, will flow through gear a and gear b to gear O, if both of the signals are off.
==NXOR Gate==
PIO
Power, supplied at the gear labeled P, will flow through gear I, which is non-toggled and linked to inputs A and B, if both signals are either off or on, but not if only one of the two signals is on.
==XOR Gate==
PiO
Power, supplied at the gear labeled P, will flow through gear i, which is pre-toggled and linked to inputs A and B, if one, but not both, of the signals is on.
=Variants=
XOR and NXOR gates can be built using multiple input gears. This may be wasteful when only a simple XOR gate is needed, but when more complex gates are needed, knowing how to build an XOR or NXOR gate can be helpful.
PAb
BaO
The above is the equivalent of an XOR gate. To see how, you can reconfigure the diagram to make it easier to understand.
P
A
b
PBaO
You can see here that this is two AND gates and a single OR gate. Thus, A XOR B is equivalent to (A AND NOT B) OR (NOT A AND B). Similarly, an NXOR gate can be built in more complex form:
PAB
baO
Reconfigured:
P
A
B
PbaO
So here you can see that the equivalent of A NXOR B is (A AND B) OR (NOT A AND NOT B).
=Reversed Power=
A given diagram is simply a path for power to flow through. As such, Power and Output gears can be exchanged at will. Thus:
PAb
BaO
Is equivalent to:
OAb
BaP
The only difference is where power enters the system at.
=Complex Gear Chains=
As an example, the following gear chain demonstrates a complex calculation using a number of inputs and some XOR and NXOR gates. The inputs are A, B, C, and S. Gear D is S NXOR B, a gear linked to A and B inputs, and non-toggled. Gear d is S XOR B, a gear linked to A and B inputs, and pre-toggled. Gear e is A XOR C, a gear linked to A and C inputs, and pre-toggled. Gear A is non-toggled, and linked to input A. Gear a is pre-toggled and linked to input A. P, as per convention, is the source of power, and O is the output gear of the chain.
PAd
DaeO
To decipher this gear chain, reduce it to known paths. P, being only a source of constant power with respect to a gear chain, can be split or joined as necessary.
P
A
d
PDaeO
At this point, we can know that the e gear will form an OR gate, because it has two input gears. The A and d gates and the D and a gates both form AND gates. The final formula is as follows: (A AND (S XOR B)) OR (NOT A AND (S NXOR B)) AND (A XOR C) With Boolean algebra, this can be reduced to: (A NXOR (S XOR B)) AND (A XOR C).

v0.31:Mechanical logic

2010-04-28T04:13:00Z

Jjdorf: Spelling and added a link to PTML.

{{av}}
{{elven}}
Mechanical logic is one discipline of {{l|computing|computing}} using mechanical {{l|power|power}} to perform logical operations. In this case powered or unpowered {{l|machine component|machine components}} represent the binary information.

The principles of mechanical logic are simple. {{l|Gear assembly|Gear assemblies}} linked to {{l|trigger|triggers}} will be toggled between disengaged and engaged when they receive an on/off signal. In this manner, you can conditionally attach power supply from {{l|windmill|windmills}} or {{l|waterwheel|waterwheels}} to specially arranged gears to build logic gates. You can also connect additional gears or other machine components as load - consuming power - to a linked gear in various configurations.

An alternative to using the gates listed here that require an extra load of gears is to use [[Pre-Toggled Mechanical Logic]]. This logic discipline has the benefit of being far easier to power, since it does not rely on extra gears to force a gear to disable in certain circumstances.

== Pros and cons ==

* needs a substancial amount of wood to construct power supply
* needs a substancial amount of {{l|mechanism|machanism}} and therefore {{l|mechanics|mechanics}} especially when you base your gates on load
* needs {{l|water|fluid}} to build converter to trigger something else than machine components

* is very fast because gears don't have a reaction delay of 100 steps
* is very flexible because gears can be toggled and therefore inverting input signals is very easy
* is easy to reconfigure because you don't have to deal with fluid or {{l|creature|creatures}} as you have to when you stick to other computing disciplines



== Power to signal converter ==
When you are dealing with mechanical logic, you'll finally want or have to trigger something else than machine components like doors or bridges. Currently, there doesn't exist any {{l|trigger|trigger}} in dwarf fortress that reacts on the working state of machine components, thus power on/off. So, you'll have to convert power via pressure plates, screw pumps and fluid into an on/off signal.
<div style="width:1px; white-space:nowrap;">
'''Z 0'''
{| cellpadding="0" cellspacing="0" style="border-spacing:0; border-style:solid; border-width:thin; border-color:#000000;"
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|-
|{{RTL|#DDD}}
|{{RTL|#DDD}}
|{{RTL|#DDD}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|-
|{{RTL|#DDD}}
|{{RTL|#222|·|#BBB}}
|{{RTL|#444|÷|#DDD}}
|{{RTL|#444|÷|#DDD|►|#00A|center|►|#00A|center}}
|{{RTL|#222|·|#BBB}}
|{{RTL|#222}}
|-
|{{RTL|#DDD}}
|{{RTL|#DDD}}
|{{RTL|#DDD}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|}
|}
</div>
<div style="width:1px; white-space:nowrap;">
'''Z-1'''
{| cellpadding="0" cellspacing="0" style="border-spacing:0; border-style:solid; border-width:thin; border-color:#000000;"
|
{| cellpadding="0" cellspacing="0" style="border-spacing:0; padding:0; margin:0; vertical-align:middle;"
|-
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|-
|{{RTL|#222}}
|{{RTL|#00A|^|#DDD||||7|#88F|left}}
|{{RTL|#DDD||||||7|#88F|left}}
|{{RTL|#DDD||||||7|#88F|left}}
|{{RTL|#DDD||||||7|#88F|left}}
|{{RTL|#222}}
|-
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|{{RTL|#222}}
|-
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|}
</div>
<br />
When the pump is connected to power, it will suck water from the pressure plate and pump it to the right. The water level on the pressure plate will fall to 0. The plate can be constructed to react on 0…3 water. You can invert it to get an off signal instead setting it to 4…7. In both cases the ''off signal'' will have a delay of 100 steps.{{Verify}} This gate is fluid conserving.
</div>
==Mechanical signal-input power-output gates==
* These gates can be used either by adding a power -> link signal converter (also known as a "rotation sensor"), or directly used to control pumps, such as in other logic gates (the unsourced fluid logic gates use these, for instance). The conventional "rotation sensor" consists of a pump powered by the gate's OUTPUT gear, pumping an infinite supply of water onto a water-sensing pressure plate with an infinite drain.
* There are certain things important to all the gates:
* Each gate has an OUTPUT gear, which will be placed next to a pump which the gate will control.
* In diagrams, the OUTPUT gear is below the 'O' gear, connected to it by gears or vertical axles. The P indicates where you should hook power up, and L indicates where load (gears or pumps that don't have a water source) should be connected, and ¦ and - are horizontal axles. The Is are gears linked to INPUTs (some gates have one input, but most have two).
* Gates which incorporate a NOT will have the power network branch off from the 'O' gear, and have a train of power-draining stuff connected to the input gears, whereas gates which do not incorporate a NOT will have the power connected to the input gears instead. The principle behind normal gates is that when the INPUTs are ON, power is connected. The principle behind the NOT gates is that power is always connected, but when the INPUTs are ON, a large enough power requirement is connected to send the power requirements above the power supply, shutting down the system.
* If your windmills produce no power, you'll have to come up with some way to use water wheels for power instead.
* You should build only enough windmills (or water wheels) to power the system, and should not connect the network for one gate to another gate's network, since that would both gates up.
* The gates' instructions will explain how much load and power you need to have at each P and L in the more complicated gates.

===Legend===
{| class="wikitable" border="1"
|-
! Symbol
! Meaning
|-
| {{diagram|[#ff0]O}}
| A gear which connects to your OUTPUT gear, which outputs power when the gate is producing an ON output.
|-
| {{diagram|[#aaf]I}}
| A gear connected to an INPUT. In most gates you will have two Is, with each one connected to a different input.
|-
| {{diagram|-}} and {{diagram|¦}}
| Horizontal axles
|-
| {{diagram|[#0f0]P}}
| Power goes here
|-
| {{diagram|[#aaf]i}}
| Two more gears, each connected to the two different inputs.
|-
| {{diagram|[#f00]L}}
| a chain of gears or pumps which serve to add load to the system, generally shutting it off when connected.
|-
| {{diagram|*}}
| A gear which isn't linked to any inputs or outputs and just serves to connect the power or whatever.
|}

===Mechanical identity gate ===
{{diagram|
[#ff0]O[#aaf]I--[#0f0]P}}

* This takes an linked input signal and converts it to power without changing it.
* Connected to the input gear, such that they will only be connected to the system if the input gear is receiving an ON signal, are gears with windmills on top of them. Build only enough windmills to power the devices that the gate's OUTPUT gear are connected to (and the gears/axles).
* When the INPUT is ON, the INPUT gear will be active, and the network will provide power to the OUTPUT. When the INPUT is OFF, it will not provide power to the OUTPUT.

===Mechanical NOT gate===
{{diagram|
[#ff0]O[#aaf]I[#f00]L
¦
¦
[#0f0]P}}

* When the INPUT is ON, the INPUT gear will be active, and the network should need more power than is available. The devices connected to OUTPUT should shut down. When INPUT is OFF, the devices should have power since the INPUT gear will be disconnected.

===Mechanical NAND gate===
{{diagram|
[#ff0]O[#aaf]I[#aaf]I[#f00]L
¦
¦
[#0f0]P}}

* This works just like the NOT gate, except that there are two inputs and both have to be active to shut down the system instead of one. Make sure you have enough power to run the system when one of the input gears is active.

===Mechanical AND gate===
{{diagram|
[#ff0]O[#aaf]I[#aaf]I[#0f0]P}}

* This works like the identity gate, except that there are two inputs and both have to be active for the system to get power.

===Mechanical OR gate===
{{diagram|
[#ff0]O[#aaf]I
[#aaf]I*[#0f0]P}}

* This works like the identity gate, except that there are two inputs, and if either is active, the system receives power. Note that the entire power network is connected to both inputs, such that if either input is active the entire power network is powering the system.

===Mechanical NOR gate===
{{diagram|
[#aaf]I*[#f00]L
[#ff0]O[#aaf]I
¦
¦
[#0f0]P}}

* This works like the NOT gate, except that there are two inputs, and if either is active, the gear train or pump stack signified by the 'L' will be connected to the system. You need to have enough load to push power requirements above the amount of power produced by the power supply, shutting the system down.

===Mechanical XOR gate===
{{diagram|
[#ff0]O[#aaf]I
[#aaf]I*--*[#0f0]P
[#000].[#aaf]i[#000].[#000].[#aaf]i
[#000].[#f00]L[#000].[#000].[#f00]L}}

* Except for the 'i's and 'L's, this gate is identical to the OR gate. The additional components add the 'exclusive' part of the 'XOR' to the gate.
* This gate may be a bit difficult to construct. First, the 'i's are additional gears connected to each of your inputs, and the Ls are additional load, however, neither load by itself should be enough to shut down the system. However, you need to make the two sets of load large enough that if both inputs are active at the same time, their power requirements become large enough to shut down the system, without making them large enough to shut it down when only one of them is active. It'll just require a little math on your part.

===Mechanical XNOR gate===
{{diagram|
[#000].[#000].[#aaf]I*[#f00]L
[#000].[#000].[#ff0]O[#aaf]I
[#000].[#000].¦
[#0f0]P[#aaf]-*[#aaf]i-[#0f0]P
[#000].[#000].[#aaf]i
[#000].[#000].¦
[#000].[#000].[#0f0]P}}

{| class="wikitable" border="1"
|-
! A
! B
! Drain
! Power
! Extra Power
! Result
|-
| 0
| 0
| No
| Yes
| No
| 1
|-
| 0
| 1
| Yes
| Yes
| Half
| 0
|-
| 1
| 0
| Yes
| Yes
| Half
| 0
|-
| 1
| 1
| Yes
| Yes
| Full
| 1
|}

* The XNOR gate is an equality gate: The output is ON when both inputs are equal, and OFF when they are not equal.
* This gate may be '''even more complicated''' to build than the XOR gate!
* First, your 'i's are again gears connected to your two inputs. The two extra Ps to the right and below them are additional power sources, ideally only one windmill each.
* Here's where it gets complicated. The load has to be sufficient to shut down the system even when ONE of the inputs' additional power supplies are connected. However, when BOTH inputs are on, there needs to be enough power from both additional Ps to bring the system back online.
* Thus our gate does what it is supposed to: Produce enough power to have the OUTPUT gear be ON when both A and B are either 0 or 1, but not when they are not equal.

v0.34:Pre-Triggered Mechanical Logic

2010-04-28T04:08:44Z

Jjdorf: moved Pre-Triggered Mechanical Logic to Pre-Toggled Mechanical Logic: Name change.

#REDIRECT [[Pre-Toggled Mechanical Logic]]

v0.31:Computing

2010-04-28T04:07:38Z

Jjdorf: Updated Mechanical Logic with new techniques.

{{av}}
{{human}}
Computing in dwarf fortress is the practice of setting up complex constructions to perform logical operations and calculations, ideally to control some functionality of your fortress. Even if it isn't a young concept anymore, there is still lots of room for improvement and development. One reason is that there are many ways to solve one problem. Innovation and invention is encouraged.
=== Binary information ===
Binary information can have one of two possible states: true or false, respectively 1 or 0. In dwarf fortress they can be represented by different entities:
* on/off state or signal of a {{l|trigger|trigger}} (pressure plate, lever)
* power or connection state of a {{l|machine component|machine component}}
* open or closed state of a {{l|door|door}} or similar buildings
* {{l|pressure plate|low/high}} or {{l|flow|flowing/standing}} {{l|water|fluid}}
* present {{l|creature|creature}}s and {{l|dwarf|borgs}}

Electronic devices and computers base on this elementary form of information, and if you want to go into computing, you’ll have to familiarize yourself with it. [http://en.wikipedia.org/wiki/Propositional_calculus propositional calculus]
=== Input/Output ===
Input can be any device which can be linked to another device with mechanisms, such as {{l|lever|levers}} or {{l|pressure plate|pressure plates}}. Pressure plates can measure water, magma, or creature weight, and can be set to react to your own dwarves if measuring creature weight. If measuring water or magma you specify the minimum and maximum levels at which it should output 'on', and at all other levels it will output an 'off' signal. Regardless of the actual amount of water, magma, or creature weight on your pressure plate, the plate can only output an 'on' or 'off' signal (1 or 0) to whatever devices it is linked to. So everything you build will have a binary base.

====Input elements====
* manual: {{l|lever|lever}} -> binary on/off signal
* triggered: {{l|pressure plate|pressure plate}} -> binary on/off signal

According to input, output can be anything that is able to react to an on/off signal. This can be doors, bridges, floodgates allowing or stopping flow, gears controlling pumps and much more. In some special configurations - when {{l|mechanical logic|mechanical logic}} is involved - output may not be a on/off signal but power, thus running or not running a machine component.

Currently to convert from power to an on/off signal, the only way is to use a screw pump connected to that power source with an unlimited amount of water and drainage at the output, and a pressure plate to measure whether water is being pumped out by the pump.

====Output elements====
* signal: {{l|pressure plate|pressure plate}} -> binary on/off signal -> linkable Object(s)
* power: {{l|gear assembly|gear assembly}} -> binary power on/power off -> machine

=== Binary logic ===
Basic binary logic takes one or two input bits and creates an output based on them. The devices that perform these operations are commonly called '''logic gates'''.<br />
* NOT - takes one input and returns the opposite of the input<br /><br />
{| class="wikitable" border=1
|-
! input A
! NOT
|-
| 0
| 1
|-
| 1
| 0
|}<br />
* AND - takes two inputs and returns true if both inputs are true
* OR - takes two inputs and returns true if at least one input is true
* XOR - takes two inputs and returns true if exactly one input is true
* NAND - takes two inputs and returns true if either input is false
* NOR - takes two inputs and returns true if both inputs are false
* NXOR - takes two inputs and returns true if both inputs are identical<br /><br />
{| class="wikitable" border=1
|-
! input A
! input B
! AND
! OR
! XOR
! NAND
! NOR
! NXOR
|-
| 0
| 0
| 0
| 0
| 0
| 1
| 1
| 1
|-
| 0
| 1
| 0
| 1
| 1
| 1
| 0
| 0
|-
| 1
| 0
| 0
| 1
| 1
| 1
| 0
| 0
|-
| 1
| 1
| 1
| 1
| 0
| 0
| 0
| 1
|}<br />
The most human-understandable logic system requires NOT, AND and OR gates, but having a design for either a NAND or a NOR gate is enough to build any of the other gates. Some gates are easier to create or need fewer components than others depending on what discipline your logic relies on. Designing each individual gate that you will need (or using designs that had each individual gate designed) rather than building a gate out of multiple NAND gates or the like will generally result in your dorfputer reacting faster and using less resources (power, water, kittens, construction materials, what-have-you).

=== Complex gates ===
* {{l|Latch|Latch}} - storing and reading a single binary value
* {{l|Repeater|Repeater}} - sending a repeating signal
* {{l|Counter|Counter}}/{{l|Adder|Adder}} - binary calculation

== Disciplines ==
Historically, prior to DF2010 there have been 3 main disciplines of dwarfputing, depending on what would drive the dwarfputer. Each of them had its assets and drawbacks. So far, DF2010 at 0.31.01 appears to be essentially the same as far as power transmission goes, barring some differences with pump vertical power transmission (they don't without the floor between being channeled, apparently). Science! will determine what, if anything, differs as far as water flow, falling, and animal pathfinding.

The three disciplines are:
=== Fluid logic ===
{{l|Infinite flow fluid logic|Infinite flow fluid logic}} is controlling the ''flow of fluid'' over different pressure plates. Fluid logic can be easily constructed and every known logic gate in dwarf fortress has already been built with it. On the other hand this discipline depends on a somehow unlimited source of the used fluid to deal with its {{l|evaporation|evaporation}} and {{L|Water#Water in Fortress Mode|destruction}}.
=== Mechanical logic ===
{{l|Mechanical logic|Mechanical logic}} uses systems of axles and {{l|gear assemblies|gear assemblies}} to build logical gates. Mechanical logic reacts very fast and can be easily constructed, except for the need for a fluid-pump-based power->signal converter in every gate. Since every gear can itself be linked to a trigger (or multiple triggers), and automatically connect to adjacent gears for transferring either power or load, mechanical logic gates are very flexible and don't require anywhere near the number of different devices that tend to be used in fluid logic gates (except, again, for the requirement for a fluid-pump-based power->signal converter in every gate, unless you intend to use it to control a pump). On the other hand this discipline uses a LOT of mechanical power, and due to the lack of a power->signal converter, also referred to as a "rotation sensor" (a device to convert from power to on/off link signals), you need to build one using fluid logic components if you want to connect multiple mechanical logic gates together or connect a mechanical logic gate to any output other than a pump. There is, however, now a fully functional fluid preserving rotation sensor design. So, in truth, current mechanical logic is more correctly termed mechanical-fluid hybrid logic, as you need some source of fluid to "prime" the rotation sensors your design will need. Along with new techniques to construct logic gates by "pre-toggling" a gear assembly (see {{l|Pre-Toggled Mechanical Logic|Pre-Toggled Mechanical Logic}}), any logical circuit can be built, given enough space in the game to do it.
=== Animal logic ===
{{l|Animal logic|Animal logic}} places animals in an enclosed room, with a door blocking the path to where they desire to go, and a pressure plate below a hatch, with obstacles which are controlled by triggers. The animal thinks it can walk through the door, and if it has a path to the door will walk up to it and stand on the hatch. When the hatch is opened by a trigger, it falls onto the pressure plate. As long as the hatch is open, or other obstacles block its path to the door it remains on the pressure plate and the output is 'on'. Once it sees a path to the door it will leave the pressure plate. Generally this is made possibly by the fact that animals try to go to their parent while they're children, or to the meeting area. There are also be designs which use captured hostiles.

There was a fourth, theoretical, discipline, Borg Logic, but there was never any reported success inventing any functioning and useful borg logic systems.

===Examples of things you could do with logic gates===
* Repeater: Repeatedly toggling hatches open and closed, or spikes up and down.
* Latch: Making resettable one-use pressure plates which are reset by a lever.
* NOT gate: Reversing the effect of a switch or creature-sensing pressure plate, generally linked to a latch device. You can, of course, mod the latch device to send the opposite signal instead of using a NOT gate.
* AND gate: Requiring more than one condition to be true for something to occur. For instance, you could have a group of AND gates, with a system on/off switch, and and other triggers, with each trigger linked to a different AND gate with the system on/off switch linked to the the second input on all the AND gates, so that when the system on/off switch is OFF the output will be OFF on all the AND gates.
* OR gate: You could link two 1-7 water sensors to an OR gate, and link that to a NOT gate, and link that to some floodgates or doors which act as emergency bulkheads, closing when water is detected in the area. Or, link the OR gate to bridges which raise instead (but you may crush things, and bridges are slower than doors).
* XOR gate: You could use pressure plates hooked to latches at different points in your fort to detect enemy intrusion, and set them up to seal off the area with both an interior and exterior bulkhead when the intrusion occurs, but hook your latches up with an XOR gate and hook the output to the interior bulkhead to unseal that one if your pressure plates have detected that the enemy has gotten past it.
* NOR gate: A NOR gate returns TRUE (ON) only if both inputs are FALSE. Instead of using the OR gate example with a NOT gate, you could use a NOR gate linked to two 1-7 water sensors, whose output goes to doors or floodgates. When the pressure plates are both waterless, the floodgates will be open. When one detects water, the floodgates close. (If you used 0-0 pressure plates with an OR, you would get an OFF signal if both plates detected water, or an ON signal otherwise (which is the same as 1-7 NAND 1-7))
* NAND gate: A NAND gate returns TRUE (ON) whenever both inputs are not both TRUE (e.g. ON NAND ON is OFF, but every other combination is ON). Instead of the OR NOT or NOR example, you could link two 0-0 water sensors to a NAND gate, and link the NAND gate's output to raising bridges. 0-0 NAND 0-0 is the same as 1-7 OR 1-7. If there is no water on both pressure plates, the NAND gate will output an OFF signal. If, however, either has water, it will output an ON signal.

* And here's a more complicated example, omitting the details of what gates to use: An automated swimming training room, where you pull a lever to close exit doors and open hatches to drop water into it, then pressure plates detect when there's enough water and close the hatches, and after a certain amount of time (using a very slow repeater, for instance), drains and exit doors open and the system resets until you pull the lever again. Or, the lever could be taken out entirely and the system could be made fully automatic (with dwarves set to train in the room, for instance) using the repeater.

{{buildings}}

== Related user pages ==
[[User:BaronW]] - The Almighty Dwarven Calculator

v0.31:Pre-Triggered Mechanical Logic

2010-04-28T04:07:26Z

Jjdorf: moved DF2010:Pre-Triggered Mechanical Logic to DF2010:Pre-Toggled Mechanical Logic: Didn't even name my own new logic discipline page correctly.

#REDIRECT [[DF2010:Pre-Toggled Mechanical Logic]]

v0.31:Pre-Toggled Mechanical Logic

2010-04-28T04:07:25Z

Jjdorf: moved DF2010:Pre-Triggered Mechanical Logic to DF2010:Pre-Toggled Mechanical Logic: Didn't even name my own new logic discipline page correctly.

{{av}}
{{elven}}
Recently some research on mechanical logic offered a new viewpoint of dealing with the limitations of this variety of logic. By including a concept called pre-toggling, one can construct nearly any conceivable logic circuit, with surmountable exceptions. From this, Pre-Toggled Mechanical Logic (PTML) was born. Due to the nature of gear assemblies, circuitry using this method can be exceptionally fast for certain purposes, and can be made 100% fluid conserving in all cases, allowing it to be isolated from an infinite water supply.
=Design Guidelines=
There are a few guidelines for working with PTML circuits.
* Levers and pressure plates should be linked to a gear assembly in the ''on'' state. For reference, a lever is off when built.
* A gear may be designated as undriven, non-toggled, or pre-toggled.
** Undriven gears are never linked to. They merely transfer what power is available to them.
** Non-toggled gears are linked to by a lever or pressure plate, and left alone. They transfer power when their truth state is true.
** Pre-toggled gears are linked to by a lever or pressure plate, then pre-toggled. To pre-toggle a gear, you build a lever, link it to the gear to pre-toggle, then flip the lever and dismantle it. As such, pre-toggled gears cost an extra mechanism. Pre-toggled gears flip the logical truth state of their inputs.
* Two gears are considered directly connected if they are either adjacent, or if they are separated by only axles and/or undriven gears.
* Two driven connected gears form an AND gate. A gear one z-level above another one is adjacent only if the floor between them has been channeled out. Power can flow through an AND gate only if both driven gears are in the true truth state.
* A single undriven gear connected to two or more driven input gears forms an OR gate. Power will flow through this gear if at least one of the driven source gears is in the true truth state.
* A single gear can be driven by multiple inputs to form an XOR or NXOR gate. For even numbers of inputs, the gear must be pre-toggled to form an XOR gate, non-toggled to form an NXOR gate. For odd numbers of inputs, the gear must be non-toggled to form an XOR gate, pre-toggled to form an NXOR gate. Power will flow through this gear only if it is in the true truth state.
* Two connected driven gears, both having identical input links, with one being non-toggled, and the other being pre-toggled, are called ''out-of-phase''. Out-of-phase gears will never transfer power through their connections.
* Determining the qualities of a PTML circuit can be done on paper or in a spreadsheet. Truth formulas for each gear can be devised to determine whether they are engaged or disengaged. This need only be done for driven gears. Power can only flow through true gears (engaged gears). An output undriven gear will have power if an orthogonal line can be drawn from the power through any series of true gears. This does not require the circuit to be built in game to verify that it works.
* Hybrid circuitry exists to allow the output of a gear train to be used to toggle other gears, or to open or close mechanically linked buildings, such as drawbridges, doors, floodgates, etc. This hybrid circuitry uses water and pressure plates as a '''rotation sensor'''.
=Diagram conventions=
In diagrams, gear assemblies are typically given a letter to represent them. If uppercase, the gear is non-toggled. If lowercase, the gear is pre-toggled.
=Sample Logic Chains=
==OR Gate==
PA
BO
Power, supplied at the gear labeled P, will flow through either gear A or gear B to gear O, if at least one of the signals is on.
==AND Gate==
PABO
Power, supplied at the gear labeled P, will flow through gear A and gear B to gear O, if both of the signals are on.
==NAND Gate==
Pa
bO
Power, supplied at the gear labeled P, will flow through gear a or gear b to gear O, if either of the signals is off.
==NOR Gate==
PabO
Power, supplied at the gear labeled P, will flow through gear a and gear b to gear O, if both of the signals are off.
==NXOR Gate==
PIO
Power, supplied at the gear labeled P, will flow through gear I, which is non-toggled and linked to inputs A and B, if both signals are either off or on, but not if only one of the two signals is on.
==XOR Gate==
PiO
Power, supplied at the gear labeled P, will flow through gear i, which is pre-toggled and linked to inputs A and B, if one, but not both, of the signals is on.
=Variants=
XOR and NXOR gates can be built using multiple input gears. This may be wasteful when only a simple XOR gate is needed, but when more complex gates are needed, knowing how to build an XOR or NXOR gate can be helpful.
PAb
BaO
The above is the equivalent of an XOR gate. To see how, you can reconfigure the diagram to make it easier to understand.
P
A
b
PBaO
You can see here that this is two AND gates and a single OR gate. Thus, A XOR B is equivalent to (A AND NOT B) OR (NOT A AND B). Similarly, an NXOR gate can be built in more complex form:
PAB
baO
Reconfigured:
P
A
B
PbaO
So here you can see that the equivalent of A NXOR B is (A AND B) OR (NOT A AND NOT B).
=Reversed Power=
A given diagram is simply a path for power to flow through. As such, Power and Output gears can be exchanged at will. Thus:
PAb
BaO
Is equivalent to:
OAb
BaP
The only difference is where power enters the system at.
=Complex Gear Chains=
As an example, the following gear chain demonstrates a complex calculation using a number of inputs and some XOR and NXOR gates. The inputs are A, B, C, and S. Gear D is S NXOR B, a gear linked to A and B inputs, and non-toggled. Gear d is S XOR B, a gear linked to A and B inputs, and pre-toggled. Gear e is A XOR C, a gear linked to A and C inputs, and pre-toggled. Gear A is non-toggled, and linked to input A. Gear a is pre-toggled and linked to input A. P, as per convention, is the source of power, and O is the output gear of the chain.
PAd
DaeO
To decipher this gear chain, reduce it to known paths. P, being only a source of constant power with respect to a gear chain, can be split or joined as necessary.
P
A
d
PDaeO
At this point, we can know that the e gear will form an OR gate, because it has two input gears. The A and d gates and the D and a gates both form AND gates. The final formula is as follows: (A AND (S XOR B)) OR (NOT A AND (S NXOR B)) AND (A XOR C) With Boolean algebra, this can be reduced to: (A NXOR (S XOR B)) AND (A XOR C).

v0.31:Pre-Toggled Mechanical Logic

2010-04-28T01:51:06Z

Jjdorf: More explanations.

{{av}}
{{elven}}
Recently some research on mechanical logic offered a new viewpoint of dealing with the limitations of this variety of logic. By including a concept called pre-toggling, one can construct nearly any conceivable logic circuit, with surmountable exceptions. From this, Pre-Toggled Mechanical Logic (PTML) was born. Due to the nature of gear assemblies, circuitry using this method can be exceptionally fast for certain purposes, and can be made 100% fluid conserving in all cases, allowing it to be isolated from an infinite water supply.
=Design Guidelines=
There are a few guidelines for working with PTML circuits.
* Levers and pressure plates should be linked to a gear assembly in the ''on'' state. For reference, a lever is off when built.
* A gear may be designated as undriven, non-toggled, or pre-toggled.
** Undriven gears are never linked to. They merely transfer what power is available to them.
** Non-toggled gears are linked to by a lever or pressure plate, and left alone. They transfer power when their truth state is true.
** Pre-toggled gears are linked to by a lever or pressure plate, then pre-toggled. To pre-toggle a gear, you build a lever, link it to the gear to pre-toggle, then flip the lever and dismantle it. As such, pre-toggled gears cost an extra mechanism. Pre-toggled gears flip the logical truth state of their inputs.
* Two gears are considered directly connected if they are either adjacent, or if they are separated by only axles and/or undriven gears.
* Two driven connected gears form an AND gate. A gear one z-level above another one is adjacent only if the floor between them has been channeled out. Power can flow through an AND gate only if both driven gears are in the true truth state.
* A single undriven gear connected to two or more driven input gears forms an OR gate. Power will flow through this gear if at least one of the driven source gears is in the true truth state.
* A single gear can be driven by multiple inputs to form an XOR or NXOR gate. For even numbers of inputs, the gear must be pre-toggled to form an XOR gate, non-toggled to form an NXOR gate. For odd numbers of inputs, the gear must be non-toggled to form an XOR gate, pre-toggled to form an NXOR gate. Power will flow through this gear only if it is in the true truth state.
* Two connected driven gears, both having identical input links, with one being non-toggled, and the other being pre-toggled, are called ''out-of-phase''. Out-of-phase gears will never transfer power through their connections.
* Determining the qualities of a PTML circuit can be done on paper or in a spreadsheet. Truth formulas for each gear can be devised to determine whether they are engaged or disengaged. This need only be done for driven gears. Power can only flow through true gears (engaged gears). An output undriven gear will have power if an orthogonal line can be drawn from the power through any series of true gears. This does not require the circuit to be built in game to verify that it works.
* Hybrid circuitry exists to allow the output of a gear train to be used to toggle other gears, or to open or close mechanically linked buildings, such as drawbridges, doors, floodgates, etc. This hybrid circuitry uses water and pressure plates as a '''rotation sensor'''.
=Diagram conventions=
In diagrams, gear assemblies are typically given a letter to represent them. If uppercase, the gear is non-toggled. If lowercase, the gear is pre-toggled.
=Sample Logic Chains=
==OR Gate==
PA
BO
Power, supplied at the gear labeled P, will flow through either gear A or gear B to gear O, if at least one of the signals is on.
==AND Gate==
PABO
Power, supplied at the gear labeled P, will flow through gear A and gear B to gear O, if both of the signals are on.
==NAND Gate==
Pa
bO
Power, supplied at the gear labeled P, will flow through gear a or gear b to gear O, if either of the signals is off.
==NOR Gate==
PabO
Power, supplied at the gear labeled P, will flow through gear a and gear b to gear O, if both of the signals are off.
==NXOR Gate==
PIO
Power, supplied at the gear labeled P, will flow through gear I, which is non-toggled and linked to inputs A and B, if both signals are either off or on, but not if only one of the two signals is on.
==XOR Gate==
PiO
Power, supplied at the gear labeled P, will flow through gear i, which is pre-toggled and linked to inputs A and B, if one, but not both, of the signals is on.
=Variants=
XOR and NXOR gates can be built using multiple input gears. This may be wasteful when only a simple XOR gate is needed, but when more complex gates are needed, knowing how to build an XOR or NXOR gate can be helpful.
PAb
BaO
The above is the equivalent of an XOR gate. To see how, you can reconfigure the diagram to make it easier to understand.
P
A
b
PBaO
You can see here that this is two AND gates and a single OR gate. Thus, A XOR B is equivalent to (A AND NOT B) OR (NOT A AND B). Similarly, an NXOR gate can be built in more complex form:
PAB
baO
Reconfigured:
P
A
B
PbaO
So here you can see that the equivalent of A NXOR B is (A AND B) OR (NOT A AND NOT B).
=Reversed Power=
A given diagram is simply a path for power to flow through. As such, Power and Output gears can be exchanged at will. Thus:
PAb
BaO
Is equivalent to:
OAb
BaP
The only difference is where power enters the system at.
=Complex Gear Chains=
As an example, the following gear chain demonstrates a complex calculation using a number of inputs and some XOR and NXOR gates. The inputs are A, B, C, and S. Gear D is S NXOR B, a gear linked to A and B inputs, and non-toggled. Gear d is S XOR B, a gear linked to A and B inputs, and pre-toggled. Gear e is A XOR C, a gear linked to A and C inputs, and pre-toggled. Gear A is non-toggled, and linked to input A. Gear a is pre-toggled and linked to input A. P, as per convention, is the source of power, and O is the output gear of the chain.
PAd
DaeO
To decipher this gear chain, reduce it to known paths. P, being only a source of constant power with respect to a gear chain, can be split or joined as necessary.
P
A
d
PDaeO
At this point, we can know that the e gear will form an OR gate, because it has two input gears. The A and d gates and the D and a gates both form AND gates. The final formula is as follows: (A AND (S XOR B)) OR (NOT A AND (S NXOR B)) AND (A XOR C) With Boolean algebra, this can be reduced to: (A NXOR (S XOR B)) AND (A XOR C).

v0.31:Pre-Toggled Mechanical Logic

2010-04-26T22:02:37Z

Jjdorf: Initial Edit

User:Jjdorf/Logic Gates

2010-04-25T01:07:39Z

Jjdorf: Tested the FL Buffer.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
===NOTE===
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User:SL/Logic_Gates]], however I have further converted it, and since it uses gears, inverted pressure plate logic, and pre-toggling with one of the gears, I am listing only it in this and further versions of the page.
===Design Guidelines===
Because the natural state of a gear is to be engaged, the first guideline is that all logic inputs to a gate must be made while the input is logically TRUE. This means that a lever intended to control an input must be flipped on before being linked to a logic gate, and it means that pressure plates must be designed to be on when the water level is under 4/7 or lower. Exceptions for general purpose I/O can be made, but for logic gate design, this rule must be adhered to.

=Fluid/Hybrid Logic=
==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is unnecessary if you can force the pump on when you need to access the pressure plate for adjustments or replacement. When the pump is on, and the thing is built and filled with the right amount of water, no water will ever be on the pressure plate tile. Once the pump shuts off, the bottom floor will be fully submerged, four tiles of 7/7 water. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out.
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 0-3 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (S) gear and the reset (r) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Differences===
A major difference between this cell and other designs is simply that this cell is considered on when the cell reservoir is ''empty'' (i.e., the pressure plate has no water in its tile). When the Data signal is received while powered, the set gear will be disengaged, and the reset gear will be engaged. This means the bottom pump will be off and the top one will be on. The cell will empty and the plate will trigger on. When the data signal is lost while powered, the gears toggle and the pumps also toggle. The top pump will stop pumping, and the bottom pump will activate. The memory cell will fill the plate tile, turning off the plate's signal after 100 steps. At any time power can be lost. When this happens, the state of the memory cell will remain the same, since neither pump will continue to function.
===TODO===
Build and test this cell. Verify that the pumps toggle immediately.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. You can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door if you chose to build it. Build the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the set gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link the lever to the gear, flip the lever then dismantle it, then link the inputs to the gear, ensuring that the input links are active, as per PTML design guidelines.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered
===Decomposed XOR Gate===
The above gate is functionally equivalent to the following, which can be used in more complicated designs.

PAb
BaO

Another variation:

PAb
aBO

==ML 8-bit Adder/Subtractor==
From my forum thread, the Adder/Subtractor uses 8 bits of an adder/subtractor assembly, one per input bit, and a carry input endcap. Inputs are one Z signal, which is false for addition, and true for subtraction; and 1 A and 1 B input per bit of addition.

First, the 1-bit adder module:

CC
PBAa PS
bB

Link the incoming A signal to the A and a gears, pre-toggling the a gear. Link the incoming B signal ''and'' the incoming Z signal to the B and b gears, pre-toggling the b gear. Construct an FL Buffer under the CC gear pair, and link its pressure plate to the S gear. Also link the A, B, and Z signals to that pressure plate. Construct a second FL Buffer under S, but ''not'' under the adjacent Power gear (P). The pressure plate of this second buffer is the result of the addition or subtraction for this bit.

Second the endcap:

*ZP

Link the Z signal to the Z gear. The extra gear * simply transfers power. The final construction will look like this:

CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
*ZP

==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever, flipped on before linking, as per PTML design guidelines. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
=Data Bus=
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are only allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles).

A connection spot to the bus will be a row of gears; specifically: 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. Essentially, the signal for reading or writing can be used in an OR gate to also provide device power.

I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself. I suspect that some of the nature of the CPU will be easier if all devices are on one bus, though this depends on the number of bus devices.

User:Jjdorf/Logic Gates

2010-04-24T23:31:22Z

Jjdorf: 8-bit adder/subtractor circuit added.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
===NOTE===
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User:SL/Logic_Gates]], however I have further converted it, and since it uses gears, inverted pressure plate logic, and pre-toggling with one of the gears, I am listing only it in this and further versions of the page.
===Design Guidelines===
Because the natural state of a gear is to be engaged, the first guideline is that all logic inputs to a gate must be made while the input is logically TRUE. This means that a lever intended to control an input must be flipped on before being linked to a logic gate, and it means that pressure plates must be designed to be on when the water level is under 4/7 or lower. Exceptions for general purpose I/O can be made, but for logic gate design, this rule must be adhered to.

=Fluid/Hybrid Logic=
==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 0-3 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (S) gear and the reset (r) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Differences===
A major difference between this cell and other designs is simply that this cell is considered on when the cell reservoir is ''empty'' (i.e., the pressure plate has no water in its tile). When the Data signal is received while powered, the set gear will be disengaged, and the reset gear will be engaged. This means the bottom pump will be off and the top one will be on. The cell will empty and the plate will trigger on. When the data signal is lost while powered, the gears toggle and the pumps also toggle. The top pump will stop pumping, and the bottom pump will activate. The memory cell will fill the plate tile, turning off the plate's signal after 100 steps. At any time power can be lost. When this happens, the state of the memory cell will remain the same, since neither pump will continue to function.
===TODO===
Build and test this cell. Verify that the pumps toggle immediately.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. You can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door if you chose to build it. Build the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the set gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link the lever to the gear, flip the lever then dismantle it, then link the inputs to the gear, ensuring that the input links are active, as per PTML design guidelines.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered
===Decomposed XOR Gate===
The above gate is functionally equivalent to the following, which can be used in more complicated designs.

PAb
BaO

Another variation:

PAb
aBO

==ML 8-bit Adder/Subtractor==
From my forum thread, the Adder/Subtractor uses 8 bits of an adder/subtractor assembly, one per input bit, and a carry input endcap. Inputs are one Z signal, which is false for addition, and true for subtraction; and 1 A and 1 B input per bit of addition.

First, the 1-bit adder module:

CC
PBAa PS
bB

Link the incoming A signal to the A and a gears, pre-toggling the a gear. Link the incoming B signal ''and'' the incoming Z signal to the B and b gears, pre-toggling the b gear. Construct an FL Buffer under the CC gear pair, and link its pressure plate to the S gear. Also link the A, B, and Z signals to that pressure plate. Construct a second FL Buffer under S, but ''not'' under the adjacent Power gear (P). The pressure plate of this second buffer is the result of the addition or subtraction for this bit.

Second the endcap:

*ZP

Link the Z signal to the Z gear. The extra gear * simply transfers power. The final construction will look like this:

CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
CC
PBAa PS
bB
*ZP

==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever, flipped on before linking, as per PTML design guidelines. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
=Data Bus=
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are only allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles).

A connection spot to the bus will be a row of gears; specifically: 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. Essentially, the signal for reading or writing can be used in an OR gate to also provide device power.

I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself. I suspect that some of the nature of the CPU will be easier if all devices are on one bus, though this depends on the number of bus devices.

User:Jjdorf/Logic Gates

2010-04-24T06:36:33Z

Jjdorf: Added 1-bit full adder design

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
===NOTE===
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User:SL/Logic_Gates]], however I have further converted it, and since it uses gears, inverted pressure plate logic, and pre-toggling with one of the gears, I am listing only it in this and further versions of the page.
===Design Guidelines===
Because the natural state of a gear is to be engaged, the first guideline is that all logic inputs to a gate must be made while the input is logically TRUE. This means that a lever intended to control an input must be flipped on before being linked to a logic gate, and it means that pressure plates must be designed to be on when the water level is under 4/7 or lower. Exceptions for general purpose I/O can be made, but for logic gate design, this rule must be adhered to.

=Fluid/Hybrid Logic=
==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 0-3 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (S) gear and the reset (r) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Differences===
A major difference between this cell and other designs is simply that this cell is considered on when the cell reservoir is ''empty'' (i.e., the pressure plate has no water in its tile). When the Data signal is received while powered, the set gear will be disengaged, and the reset gear will be engaged. This means the bottom pump will be off and the top one will be on. The cell will empty and the plate will trigger on. When the data signal is lost while powered, the gears toggle and the pumps also toggle. The top pump will stop pumping, and the bottom pump will activate. The memory cell will fill the plate tile, turning off the plate's signal after 100 steps. At any time power can be lost. When this happens, the state of the memory cell will remain the same, since neither pump will continue to function.
===TODO===
Build and test this cell. Verify that the pumps toggle immediately.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. You can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door if you chose to build it. Build the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the set gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link the lever to the gear, flip the lever then dismantle it, then link the inputs to the gear, ensuring that the input links are active, as per PTML design guidelines.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML Full 1-bit Adder==
As designed on my forum posts, a 1-bit full feature adder "chip" can be built from combined logic gates. This adder takes as input three single bit numbers, which are added together to produce two outputs, a result and a carry.

OIPAB
ZxC

Power (P) is provided, and must be a gear. The outputs (O & C) are most likely to be direct connections to FL Buffers. Input gears are the complicated part. Each input signal, A, B, and Z, are the three single bit inputs. Z is what is commonly known as the Carry input. The gears labeled A, B, and Z are standard non-pre-toggled gears linked to these signals. The two other gears use combinations of these inputs to produce the correct results. The first, x, is a pre-toggled gear linked to A and B signals. The second, I, is a non-pre-toggled gear linked to all three input signals. This last gear is known as a three input XOR gate, and is active when an odd number of inputs are true.

The power cost of this gear train, including the P gear, but not addition power train, nor the output trains, costs exactly 30 power. It will take 7 mechanisms to build, excluding the cost of linking input signals (which by my convention, is included in the cost of Fluid memory and buffer gates).

==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever, flipped on before linking, as per PTML design guidelines. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
=Data Bus=
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are only allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles).

A connection spot to the bus will be a row of gears; specifically: 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. Essentially, the signal for reading or writing can be used in an OR gate to also provide device power.

I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself. I suspect that some of the nature of the CPU will be easier if all devices are on one bus, though this depends on the number of bus devices.

User:Jjdorf/Logic Gates

2010-04-24T02:32:11Z

Jjdorf: minor edit.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
===NOTE===
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User:SL/Logic_Gates]], however I have further converted it, and since it uses gears, inverted pressure plate logic, and pre-toggling with one of the gears, I am listing only it in this and further versions of the page.
===Design Guidelines===
Because the natural state of a gear is to be engaged, the first guideline is that all logic inputs to a gate must be made while the input is logically TRUE. This means that a lever intended to control an input must be flipped on before being linked to a logic gate, and it means that pressure plates must be designed to be on when the water level is under 4/7 or lower. Exceptions for general purpose I/O can be made, but for logic gate design, this rule must be adhered to.

=Fluid/Hybrid Logic=
==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 0-3 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (S) gear and the reset (r) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Differences===
A major difference between this cell and other designs is simply that this cell is considered on when the cell reservoir is ''empty'' (i.e., the pressure plate has no water in its tile). When the Data signal is received while powered, the set gear will be disengaged, and the reset gear will be engaged. This means the bottom pump will be off and the top one will be on. The cell will empty and the plate will trigger on. When the data signal is lost while powered, the gears toggle and the pumps also toggle. The top pump will stop pumping, and the bottom pump will activate. The memory cell will fill the plate tile, turning off the plate's signal after 100 steps. At any time power can be lost. When this happens, the state of the memory cell will remain the same, since neither pump will continue to function.
===TODO===
Build and test this cell. Verify that the pumps toggle immediately.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. You can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door if you chose to build it. Build the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the set gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link the lever to the gear, flip the lever then dismantle it, then link the inputs to the gear, ensuring that the input links are active, as per PTML design guidelines.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever, flipped on before linking, as per PTML design guidelines. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
=Data Bus=
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are only allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles).

A connection spot to the bus will be a row of gears; specifically: 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. Essentially, the signal for reading or writing can be used in an OR gate to also provide device power.

I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself. I suspect that some of the nature of the CPU will be easier if all devices are on one bus, though this depends on the number of bus devices.

User:Jjdorf/Logic Gates

2010-04-24T02:19:18Z

Jjdorf: more formatting

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
===NOTE===
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User:SL/Logic_Gates]], however I have further converted it, and since it uses gears, inverted pressure plate logic, and pre-toggling with one of the gears, I am listing only it in this and further versions of the page.
===Design Guidelines===
Because the natural state of a gear is to be engaged, the first guideline is that all logic inputs to a gate must be made while the input is logically TRUE. This means that a lever intended to control an input must be flipped on before being linked to a logic gate, and it means that pressure plates must be designed to be on when the water level is under 4/7 or lower. Exceptions for general purpose I/O can be made, but for logic gate design, this rule must be adhered to.

=Fluid/Hybrid Logic=
==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 0-3 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (S) gear and the reset (r) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Differences===
A major difference between this cell and other designs is simply that this cell is considered on when the cell reservoir is ''empty'' (i.e., the pressure plate has no water in its tile). When the Data signal is received while powered, the set gear will be disengaged, and the reset gear will be engaged. This means the bottom pump will be off and the top one will be on. The cell will empty and the plate will trigger on. When the data signal is lost while powered, the gears toggle and the pumps also toggle. The top pump will stop pumping, and the bottom pump will activate. The memory cell will fill the plate tile, turning off the plate's signal after 100 steps. At any time power can be lost. When this happens, the state of the memory cell will remain the same, since neither pump will continue to function.
===TODO===
Build and test this cell. Verify that the pumps toggle immediately.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. You can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door if you chose to build it. Build the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the set gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link it to the gear, flip the lever, dismantle the lever if the mechanisms are desired, then link the inputs to the gear, ensuring that the input links are not active (logically zero).
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever, flipped on before linking, as per PTML design guidelines. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
=Data Bus=
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are only allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles).

A connection spot to the bus will be a row of gears; specifically: 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. Essentially, the signal for reading or writing can be used in an OR gate to also provide device power.

I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself. I suspect that some of the nature of the CPU will be easier if all devices are on one bus, though this depends on the number of bus devices.

User:Jjdorf/Logic Gates

2010-04-24T02:18:38Z

Jjdorf: Cleanup and redesign of the memory cell; clear statement of PTML design guidelines; Formatting.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
=NOTE=
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User:SL/Logic_Gates]], however I have further converted it, and since it uses gears, inverted pressure plate logic, and pre-toggling with one of the gears, I am listing only it in this and further versions of the page.
=Design Guidelines=
Because the natural state of a gear is to be engaged, the first guideline is that all logic inputs to a gate must be made while the input is logically TRUE. This means that a lever intended to control an input must be flipped on before being linked to a logic gate, and it means that pressure plates must be designed to be on when the water level is under 4/7 or lower. Exceptions for general purpose I/O can be made, but for logic gate design, this rule must be adhered to.

=Fluid/Hybrid Logic=
==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 0-3 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (S) gear and the reset (r) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Differences===
A major difference between this cell and other designs is simply that this cell is considered on when the cell reservoir is ''empty'' (i.e., the pressure plate has no water in its tile). When the Data signal is received while powered, the set gear will be disengaged, and the reset gear will be engaged. This means the bottom pump will be off and the top one will be on. The cell will empty and the plate will trigger on. When the data signal is lost while powered, the gears toggle and the pumps also toggle. The top pump will stop pumping, and the bottom pump will activate. The memory cell will fill the plate tile, turning off the plate's signal after 100 steps. At any time power can be lost. When this happens, the state of the memory cell will remain the same, since neither pump will continue to function.
===TODO===
Build and test this cell. Verify that the pumps toggle immediately.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. You can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door if you chose to build it. Build the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the set gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link it to the gear, flip the lever, dismantle the lever if the mechanisms are desired, then link the inputs to the gear, ensuring that the input links are not active (logically zero).
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever, flipped on before linking, as per PTML design guidelines. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
=Data Bus=
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are only allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles).

A connection spot to the bus will be a row of gears; specifically: 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. Essentially, the signal for reading or writing can be used in an OR gate to also provide device power.

I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself. I suspect that some of the nature of the CPU will be easier if all devices are on one bus, though this depends on the number of bus devices.

User:Jjdorf/Logic Gates

2010-04-23T23:51:41Z

Jjdorf: jjdorf draws a sketch of new and improved mechanical logic gates...

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation. I have verified that gears toggle, rather than set and reset, and that pre-toggling gears for the various gate designs also works, and as such, the mechanical logic designs below are far less complex and still 100% feasible to build, though the ones that require pre-toggling will cost one or two more mechanisms.
=NOTE=
A previous version of this page holds a fluid logic memory cell, derived from the one found on [[User::SL/Logic_Gates]], however I have further converted it, and since it uses gears and pre-toggling to cycle the memory, I am listing only it in this and further versions of the page.

==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).

=Pre-Toggle Mechanical Logic Gates (PTML Gates)=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The result is that the excessive load gear trains for certain gates can be eliminated, providing quantifiable power usage per gate, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever. All input links to a gear should be done in the logical off mode, such as with a newly built lever, or with a 7-7 water pressure plate with no water resting on it.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.
===Bill of Materials===
For the gate itself, just one mechanism. Linking signals is never counted in BoM.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Bill of Materials===
2 Mechanisms
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
2 Mechanisms
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===Bill of Materials===
4 Mechanisms
4 Additional Mechanisms which are then recovered
Linking to a power or signal train may require additional gear assemblies, however. Only a pump or a gear assembly can exist in the P and O spots.

==ML XOR Gate==
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs minimal power to run and is relatively simple to construct.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. I have tested with a synchronized pump system that two toggle signals occurring at the same time are treated as two separate toggles, and thus cancel out, as should be. Of particular note is that this option is as power and space efficient as a simple NOT or Buffer gate. Building is easy; build the input gear assembly, build a lever, link it to the gear, flip the lever, dismantle the lever if the mechanisms are desired, then link the inputs to the gear, ensuring that the input links are not active (logically zero).
===Bill of Materials===
2 Mechanisms
2 Additional Mechanisms which are then recovered

==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 7-7 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (s) gear and the reset (R) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the reset gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
8 Mechanisms (5 for gear assemblies, 1 for pre-toggling, 2 for linking the pressure plate)
2 Additional Mechanisms which are then recovered
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.
==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
==Data Bus==
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles). A connection spot to the bus will be a row of gears, specifically, 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems are needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. A minimal standby power supply will also be needed to allow activation of a device in the first place. I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself.

User:Jjdorf/Logic Gates

2010-04-23T23:02:45Z

Jjdorf: More design work.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation.

==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Do X X
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).

==FL RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, Connect to a power source that provides at least 20 + your connector, then stick a fork in it. It's done.
===Bill of Materials===
(Excluding power source gear or axle and hatch source links)
3-4 Doors
2 Hatch Covers
2 Corkscrews
2 Pipe Sections
2 Blocks
1 Grate
4 Mechanisms
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. The water in this cell will never be at less than 3/7 if properly constructed. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. Finally, the cell is, fundamentally, only two tiles wide, not considering power hookup. The walls can be shared with adjacent memory cells or other constructions. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. Both hatches are initially closed. When the SET hatch gets its signal, it opens up and the constantly running pump pulls water from the main reservoir and puts it into the pressure plate cell. The plate triggers and the memory cell is effectively on, or 1. The SET signal can (and should) clear at this time, closing the hatch. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. Until, of course, the CLEAR hatch gets a signal. At this point the top pump will be able to pull the water out of the cell reservoir (If it was there when the signal was sent), returning the cell to its original state. The only state that has not been considered is when both hatches are open at once. When this occurs, the output of the pressure plate will be unknown at any given point. Water will be cycling constantly through the cell, and the cell will be, for all purposes, unusable. Obviously, this is a condition we want to avoid.
===Electrical Similarities===
This memory cell design is almost identical to a standard RS Flip-Flop circuit. The exceptions are that it only provides one output, and the SET and RESET signals are default HIGH (on) in the electrical version. The implementation is also somewhat different as well, but that is not particularly important.

==FL RAM Byte (Including Power Supply)==
An extension of the above, with an expanded Dwarven Water Reactor to provide power.

XDXDXDXDXDXDXDXDX
X#X#X#X#X#X#X#X#X
X^X^X^X^X^X^X^X^X *
%-%-%-%-%-%-%-%--*
H H H H H H H H

XDXDXDXDXDXDXDXDXXXXXXX
XHXHXHXHXHXHXHXHXW W WX
X%X%X%X%X%X%X%X%XW^W^WX
XvXvXvXvXvXvXvXvXW%W%W
XoXoXoXoXoXoXoXoX # #
XDXDXDXDXDXDXDXDX

XDXDXDXDXDXDXDXDXXXXXXX
X X X X X X X X X X X X
XXXXXXXXXXXXXXXXX X X X
M M M M M M M MX X X X
XX X XX
XXXXX

===Notes===
The Water Reactor used here will provide exactly 250 excess power. The memory cells themselves will cost 160, leaving 90 for the power train. The power train consists of two gears and 9 axle tiles, for 19 power, leaving 71 surplus power. The output gears are not considered part of the power train, as they will typically be used in other logic circuits, and will likely need more than 71 power to run whatever they are intended for. This leaves that power for other applications as needed.

=Custom Mechanical Gates=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The hope is that the excessive load gear trains for certain gates can be eliminated, providing upper boundaries on power usage, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever.

==WARNING!!!==
I have '''''NOT'''''' yet tested these gates. The gates that require pre-toggled gears are theoretical at this point, though I intend to test them in the next day or so.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

In all ML schematics, a lower case gear spot will indicate that it is pre toggled via a lever. Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.
===Equivalence to a Tri-State Buffer===
With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.
===ML Multi-Input AND Bar/Stack===
The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.
==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.
===ML Multi-Input OR Bar/Stack===
Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.

==ML XOR Gate==
XOR, or Exclusive OR, is much like an OR gate, except that it only activates when only one input is active.

P-A
| b
BaO

This operates on the principle that XOR = (A AND NOT B) OR (B AND NOT A). Because we can pre-toggle gears, we can input an implied NOT operation. The resulting AND and OR ops are simple copies from above. This gate requires a bit more space, but not nearly as much as would be needed if a drain load were used. If one is willing to have the design require more power and two z-levels, it can be built with two pathways on top of each other, taking advantage of the fact that power doesn't transfer from floor to floor without channeling.

From the side:

*Ab*
PaBO

Channels would only be present between the Power (P) and Output(O) tiles, and the tiles above them (or below if you swap layers). The inputs (A, B, a, & b) provide pathways from the power to the output. Depending on where the power source is, the power drain at any state will be in the range of 10 to 20 units of power. If the power source is designed to '''not''' be on the same z-level of the output, the power drain will always be 15 when the XOR function evals to true.
===Variant===
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs less power to run but is slightly more complicated to link up.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. Testing will need to be done to determine if there are issues with a gear receiving two toggles at the same time frame; if so then this gear design will have the limitation that input signals cannot flip at the same time. Of particular note is that this option is far more power and space efficient than the previous design. Building is easy; build the input gear assembly, build a lever, link it to the gear, flip the lever, dismantle the lever if the mechanisms are desired, then link the inputs to the gear, ensuring the the input links are not active.
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 7-7 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (s) gear and the reset (R) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the reset gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
6 Mechanisms
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.
==DPROM==
Dwarf Programmable Read Only Memory, is quite simple. It is a lever. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)
==Data Bus==
The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles). A connection spot to the bus will be a row of gears, specifically, 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems are needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. A minimal standby power supply will also be needed to allow activation of a device in the first place. I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself.

User:Jjdorf/TODO

2010-04-23T15:13:14Z

Jjdorf: update

* Test the rotation sensor, especially the possibility to power it from the source end of the screw pump.
* <s>Design a Hybrid Logic (HL) Memory Cell, duplicating the D Flip-Flop semantics, specifically, a data line and a clock line instead of SET and RESET</s>. Power source is co-opted as the clock line.
* For completeness go through and build all of the mechanical logic gates, verifying that each of them work. Test Dorf3000's XOR variant first, specifically the synchronized signal question, and if it works, skip the original variant for XOR. Of particular interest is whether gears properly toggle.
* Other designs such as a design which safely transfers power from z=0 to z=1, allowing connection of one gate to another that requires input on the top level.
* After verifying the D Flip-Flop cell is functional, design a Byte of HL memory, including power supply. This will also a Write Enable (WE) connection. The easiest way to do this is to only enable power to the pumps on a write enable.
* Design (Hah!) and diagram DPROM, Dorf Programmable Read Only Memory, i.e. a bank of levers. The design needs are simple enough, but will be useful when a full design for addressable memory comes into play.
* Design a General Purpose Input (GPI) cell. Ideally, this will simply be a plain FL buffer gate, with the signal gear being the gear that gets modified if the GPI connection needs to be changed, rather than pressure plate in the system, which would be dedicated entirely to the memory system.
*Design a General Purpose Output (GPO) cell. Ideally, this should simply be a plain HL Memory Cell combined with a buffer. The cell, in addition to being linked to the memory system, will also drive the buffer. The output of the buffer can be re-purposed for different outputs somewhat easier, disregarding any potential water issues. Proper Maintenance of the GPO buffer would involve writing a quick little program to turn the cell on, then applying it and going to make the change. While the buffer is on the pressure plate should be fully accessible.
* Design a demultiplexer/decoder circuit, taking a 3-bit binary input code and converting it into a set of gears, only one of which will be functional at once. This will be used for an addressing scheme.
* Design an 8-byte Addressable memory chip, including HL memory cells, 8-bit data inputs, 8-bit outputs, 3-bit address input, chip select input, Read enable and Write enable inputs, and, of course, the required power supply to run the chip. For the (hopefully) far future when Dwarven Water Reactors and other perpetual motion devices no longer work... explain how much power draw the chip takes. This will also help if a more compact memory block is to be built from this design, such as say... a block of 64 bytes.

User:Jjdorf/Logic Gates

2010-04-23T15:12:23Z

Jjdorf: Added Hybrid RAM cell design.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water.

==FL Buffer/Rotation Sensor==
Modified slightly from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Xo D Xo D
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Bill of Materials===
(Excluding the signal source and pressure plate linkage)
2 Doors
1 Mechanism
1 Corckscrew
1 Pipe Section
1 Block
1 Grate
===Inverter===
An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.
===Hybrid===
Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.
===How It Works===
When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).

==FL RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, Connect to a power source that provides at least 20 + your connector, then stick a fork in it. It's done.
===Bill of Materials===
(Excluding power source gear or axle and hatch source links)
3-4 Doors
2 Hatch Covers
2 Corkscrews
2 Pipe Sections
2 Blocks
1 Grate
4 Mechanisms
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. The water in this cell will never be at less than 3/7 if properly constructed. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. Finally, the cell is, fundamentally, only two tiles wide, not considering power hookup. The walls can be shared with adjacent memory cells or other constructions. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. Both hatches are initially closed. When the SET hatch gets its signal, it opens up and the constantly running pump pulls water from the main reservoir and puts it into the pressure plate cell. The plate triggers and the memory cell is effectively on, or 1. The SET signal can (and should) clear at this time, closing the hatch. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. Until, of course, the CLEAR hatch gets a signal. At this point the top pump will be able to pull the water out of the cell reservoir (If it was there when the signal was sent), returning the cell to its original state. The only state that has not been considered is when both hatches are open at once. When this occurs, the output of the pressure plate will be unknown at any given point. Water will be cycling constantly through the cell, and the cell will be, for all purposes, unusable. Obviously, this is a condition we want to avoid.
===Electrical Similarities===
This memory cell design is almost identical to a standard RS Flip-Flop circuit. The exceptions are that it only provides one output, and the SET and RESET signals are default HIGH (on) in the electrical version. The implementation is also somewhat different as well, but that is not particularly important.

==FL RAM Byte (Including Power Supply)==
An extension of the above, with an expanded Dwarven Water Reactor to provide power.

XDXDXDXDXDXDXDXDX
X#X#X#X#X#X#X#X#X
X^X^X^X^X^X^X^X^X *
%-%-%-%-%-%-%-%--*
H H H H H H H H

XDXDXDXDXDXDXDXDXXXXXXX
XHXHXHXHXHXHXHXHXW W WX
X%X%X%X%X%X%X%X%XW^W^WX
XvXvXvXvXvXvXvXvXW%W%W
XoXoXoXoXoXoXoXoX # #
XDXDXDXDXDXDXDXDX

XDXDXDXDXDXDXDXDXXXXXXX
X X X X X X X X X X X X
XXXXXXXXXXXXXXXXX X X X
M M M M M M M MX X X X
XX X XX
XXXXX

===Notes===
The Water Reactor used here will provide exactly 250 excess power. The memory cells themselves will cost 160, leaving 90 for the power train. The power train consists of two gears and 9 axle tiles, for 19 power, leaving 71 surplus power. The output gears are not considered part of the power train, as they will typically be used in other logic circuits, and will likely need more than 71 power to run whatever they are intended for. This leaves that power for other applications as needed.

=Custom Mechanical Gates=
In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The hope is that the excessive load gear trains for certain gates can be eliminated, providing upper boundaries on power usage, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever.

==WARNING!!!==
I have '''''NOT'''''' yet tested these gates. The gates that require pre-toggled gears are theoretical at this point, though I intend to test them in the next day or so.

==ML Buffer==
Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.

==ML Inverter (NOT)==
This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

In all ML schematics, a lower case gear spot will indicate that it is pre toggled via a lever. Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.

==ML AND Gate==
Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.

==ML OR Gate==
Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.

==ML NOR Gate==
Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.

==ML NAND Gate==
Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.

==ML XOR Gate==
XOR, or Exclusive OR, is much like an OR gate, except that it only activates when only one input is active.

P-A
| b
BaO

This operates on the principle that XOR = (A AND NOT B) OR (B AND NOT A). Because we can pre-toggle gears, we can input an implied NOT operation. The resulting AND and OR ops are simple copies from above. This gate requires a bit more space, but not nearly as much as would be needed if a drain load were used. If one is willing to have the design require more power and two z-levels, it can be built with two pathways on top of each other, taking advantage of the fact that power doesn't transfer from floor to floor without channeling.

From the side:

*Ab*
PaBO

Channels would only be present between the Power (P) and Output(O) tiles, and the tiles above them (or below if you swap layers). The inputs (A, B, a, & b) provide pathways from the power to the output. Depending on where the power source is, the power drain at any state will be in the range of 10 to 20 units of power. If the power source is designed to '''not''' be on the same z-level of the output, the power drain will always be 15 when the XOR function evals to true.
===Variant===
A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs less power to run but is slightly more complicated to link up.

PiO

The difference is that '''both''' the A & B inputs are linked up to the same single input gear. Testing will need to be done to determine if there are issues with a gear receiving two toggles at the same time frame; if so then this gear design will have the limitation that input signals cannot flip at the same time. Of particular note is that this option is far more power and space efficient than the previous design.
==HL (Hybrid Logic) RAM==
A Hybrid Logic Random Access Memory, basic cell structure:

|
*R .

XXX XXX
#%>#D . .
XXX XXX

XXXXXX XXXXXX
Do<%#D . .
XXXXXX XXXXXX

| XXX XXX
*sX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 7-7 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (s) gear and the reset (R) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the reset gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
* Build the power linkage.
===Bill of Materials===
(Excluding power source gear or axle and data source links)
3-4 Doors
2 Corkscrews
2 Pipe Sections
2 Blocks
3 Grates
6 Mechanisms
===Maintenance===
You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.
===How It Works===
At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.
===Electrical Similarities===
This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

User:Jjdorf/TODO

2010-04-23T14:31:54Z

Jjdorf: Added my TODO list while withdrawn from society...

* Test the rotation sensor, especially the possibility to power it from the source end of the screw pump.
* Design a Hybrid Logic (HL) Memory Cell, duplicating the D Flip-Flop semantics, specifically, a data line and a clock line instead of SET and RESET.
* For completeness go through and build all of the mechanical logic gates, verifying that each of them work. Test Dorf3000's XOR variant first, specifically the synchronized signal question, and if it works, skip the original variant for XOR. Of particular interest is whether gears properly toggle.
* Other designs such as a design which safely transfers power from z=0 to z=1, allowing connection of one gate to another that requires input on the top level.
* After verifying the D Flip-Flop cell is functional, design a Byte of HL memory, including power supply. This will also a Write Enable (WE) connection. The easiest way to do this is to only enable power to the pumps on a write enable.
* Design (Hah!) and diagram DPROM, Dorf Programmable Read Only Memory, i.e. a bank of levers. The design needs are simple enough, but will be useful when a full design for addressable memory comes into play.
* Design a General Purpose Input (GPI) cell. Ideally, this will simply be a plain FL buffer gate, with the signal gear being the gear that gets modified if the GPI connection needs to be changed, rather than pressure plate in the system, which would be dedicated entirely to the memory system.
*Design a General Purpose Output (GPO) cell. Ideally, this should simply be a plain HL Memory Cell combined with a buffer. The cell, in addition to being linked to the memory system, will also drive the buffer. The output of the buffer can be re-purposed for different outputs somewhat easier, disregarding any potential water issues. Proper Maintenance of the GPO buffer would involve writing a quick little program to turn the cell on, then applying it and going to make the change. While the buffer is on the pressure plate should be fully accessible.
* Design a demultiplexer/decoder circuit, taking a 3-bit binary input code and converting it into a set of gears, only one of which will be functional at once. This will be used for an addressing scheme.
* Design an 8-byte Addressable memory chip, including HL memory cells, 8-bit data inputs, 8-bit outputs, 3-bit address input, chip select input, Read enable and Write enable inputs, and, of course, the required power supply to run the chip. For the (hopefully) far future when Dwarven Water Reactors and other perpetual motion devices no longer work... explain how much power draw the chip takes. This will also help if a more compact memory block is to be built from this design, such as say... a block of 64 bytes.

User:Jjdorf/Logic Gates

2010-04-23T13:57:47Z

Jjdorf:

User:Jjdorf/Logic Gates

2010-04-23T05:46:52Z

Jjdorf: Additions to the Buffer gate TODO section, Added pre-toggling mechanical gates, re-arranged/clarified intro paragraph.

User:Jjdorf/Logic Gates

2010-04-23T04:19:45Z

Jjdorf: More notes...

User:Jjdorf/Logic Gates

2010-04-23T03:54:27Z

Jjdorf: minor edit to BoM

User:Jjdorf/Logic Gates

2010-04-23T03:25:12Z

Jjdorf: Added design for a self powered byte of RAM.

User:Jjdorf/Logic Gates

2010-04-23T03:05:19Z

Jjdorf: clarification and notes.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build requirements, and build order, including the point when an input needs to be hooked up to things. For the most part, I will be using [[DF2010:Mechanical logic]] for my basic logic gates.
==Rotation Sensor==
Modified from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Xo D Xo D
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===Notes===
A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater ''fan-out'' than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates '''can''' be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer.
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.

==RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, Connect to a power source that provides at least 20 + your connector, then stick a fork in it. It's done.
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. Finally, the cell is, fundamentally, only two tiles wide, not considering power hookup. The walls can be shared with adjacent memory cells or other constructions. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.

User:Jjdorf/Logic Gates

2010-04-23T02:15:05Z

Jjdorf: Added a rotation sensor, with credit to the original source, with slight modifications for maintenance.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build requirements, and build order, including the point when an input needs to be hooked up to things.
==Rotation Sensor==
Modified from: [[DF2010:Mechanical logic]]

XXX XXX
S%>#D . .
XXX XXX

XXXXXX XXXXXX
Xo D Xo D
XXXXXX XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).
===Building===
* First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
* Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
* Build the screw pump, pumping toward the grate and away from the signal line direction.
* Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
* Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.
===TODO===
Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer.
===Pros/Cons===
The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.

==RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, Connect to a power source that provides at least 20 + your connector, then stick a fork in it. It's done.
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. Finally, the cell is, fundamentally, only two tiles wide, not considering power hookup. The walls can be shared with adjacent memory cells or other constructions. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.

User:Jjdorf/Logic Gates

2010-04-23T01:39:40Z

Jjdorf:

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build requirements, and build order, including the point when an input needs to be hooked up to things.
==Rotation Sensor==
To be designed and fully tested.
==RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, Connect to a power source that provides at least 20 + your connector, then stick a fork in it. It's done.
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.

Jjdorf/Logic Gates

2010-04-23T01:35:48Z

Jjdorf: moved Jjdorf/Logic Gates to User:Jjdorf/Logic Gates: Meant to be a user page.

#REDIRECT [[User:Jjdorf/Logic Gates]]

User:Jjdorf/Logic Gates

2010-04-23T01:35:48Z

Jjdorf: moved Jjdorf/Logic Gates to User:Jjdorf/Logic Gates: Meant to be a user page.

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build requirements, and build order, including the point when an input needs to be hooked up to things.
==Rotation Sensor==
To be designed and fully tested.
==RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, then stick a fork in it. It's done.
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.

User:Jjdorf/Logic Gates

2010-04-23T01:34:13Z

Jjdorf: Started work on logic designs... jjdorf has withdrawn from society...

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build requirements, and build order, including the point when an input needs to be hooked up to things.
==Rotation Sensor==
To be designed and fully tested.
==RAM==
Random Access Memory, basic cell structure:

PXXX XXX
H%>#D . ..
XXX XXX

XXXXXX XXXXXX
Do<%HD .
XXXXXX XXXXXX

XXX XXX
MX D X
XXX XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.
===Building===
* The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
* Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
* Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
* Build the hatch on the middle layer.
* Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
* Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
* Forbid the door on the top layer, then stick a fork in it. It's done.
===Maintenance===
You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.
===Notes===
This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.
===Pros/Cons===
The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.

v0.31 Talk:Water wheel

2010-04-20T09:27:25Z

Jjdorf:

==Perpetual Motion==
Done a few quick tests. Waterwheels and screw pumps still have the same numbers for power. Built a perpetual motion machine using the #3 reactor design which works as before. [[User:Doctorzuber|Doctorzuber]] 19:10, 2 April 2010 (UTC)
:Also tested the Dwarven Water Reactor, as well as a mini variant. Both function fully and are repeatable. Thus, I added the two designs into the page. [[User:Jjdorf|Jjdorf]] 09:27, 20 April 2010 (UTC)