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Editing v0.34 Talk:Memory (computing)

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===Fluid logic latch===
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--[[User:Larix|Larix]] ([[User talk:Larix|talk]]) 11:16, 20 May 2014 (UTC)===Fluid logic latch===
  
 
As far as i can tell, the circuit originally presented was no latch or memory device - if it received moderately spaced signals as input, output would be absolutely equal to input. In order to get a state change from an input ''signal cycle'', the typical measure of Dwarf Fortress memory (a.k.a. signal separation), it would require a fast cycle, faster than the reaction delay of bridges and floodgates. Such quick signal cycles take either double-pull orders on levers or dedicated input regulators, and no such thing was mentioned.  
 
As far as i can tell, the circuit originally presented was no latch or memory device - if it received moderately spaced signals as input, output would be absolutely equal to input. In order to get a state change from an input ''signal cycle'', the typical measure of Dwarf Fortress memory (a.k.a. signal separation), it would require a fast cycle, faster than the reaction delay of bridges and floodgates. Such quick signal cycles take either double-pull orders on levers or dedicated input regulators, and no such thing was mentioned.  
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If this was completely wrong, feel free to correct me.--[[User:Larix|Larix]] ([[User talk:Larix|talk]]) 21:17, 19 May 2014 (UTC)
 
If this was completely wrong, feel free to correct me.--[[User:Larix|Larix]] ([[User talk:Larix|talk]]) 21:17, 19 May 2014 (UTC)
  
Note on the minecart logic latch: i think it's better to call the single-connected track bits "track ends". Track stops can be found in the building menu, they're [[Minecart#More_on_Track_stop|those]] and don't belong in this memory cell at all. --[[User:Larix|Larix]] ([[User talk:Larix|talk]]) 11:16, 20 May 2014 (UTC)
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Note on the minecart logic latch: i think it's better to call the single-connected track bits "track ends". Track stops can be found in the building menu, they're [[Minecart#More_on_Track_stop|those]] and don't belong in this memory cell at all.

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