User:Jjdorf/Logic Gates

I'll be using this as a spot to keep all my preferred logic designs in one spot. Each design will specify the power requirements, build materials (excluding walls if constructing rather than digging), and build order, including the points when an input or output needs to be hooked up to things. I consider gate technology in DF to be of two major types, Fluid Logic (FL), and Mechanical Logic (ML). Borg logic, while interesting and certainly amusing, I believe to have too much of an impracticality in pathfinding cost and a lack of precision; Thus, I will generally disregard it until more intrepid scientists prove my biased assumptions incorrect. For the most part, I will be using DF2010:Mechanical logic for my basic logic gates, due to the fact that I want to completely avoid the need for an infinite water source. The exception to this restriction lies in two gates (so far), and these exceptions occur for a simply reason: they have variants which do not lose water. Another design goal is the creation of mechanical logic gates that do not, in any way, use load gear trains to affect their operation.

FL Buffer/Rotation Sensor

Modified slightly from: DF2010:Mechanical logic

   XXX       XXX
 S%>#D     .  .
   XXX       XXX

XXXXXX    XXXXXX
Do   X         X
XXXXXX    XXXXXX

Both doors (D) are ordinarily forbidden under normal operation. A water drain path is a good idea if maintenance is ever necessary on the bottom floor. The mechanical input (S) provides the power to the pump. Enough power must be available at this point to drive the pump (10 units) when the signal gear or axle is functioning. The pressure plate (o) on the bottom layer is set to 0-3 water level. The screw pump (%>) pumps away from the signal mechanism, towards a floor grate (#).

Building

• First, construct or dig the walls and floors. If constructing, do NOT build floors at the empty space tiles (.), channel the same tiles if digging from the rock.
• Build the pressure plate on the bottom layer, then link it to whatever is needed. Forbid the Bottom level door. Build the grate.
• Build the screw pump, pumping toward the grate and away from the signal line direction.
• Designate a pond at the grate tile, filling the bottom layer full (all four tiles to 7/7 water).
• Hook the pump up to the signal mechanism. Test with whatever logic is needed if desired. The sensor is finished.

Bill of Materials

(Excluding the signal source and pressure plate linkage) 2 Doors 1 Mechanism 1 Corckscrew 1 Pipe Section 1 Block 1 Grate

Inverter

An inverter can be built with identical properties and build sequence by simply changing the pressure plate to trigger on 4-7 water.

Hybrid

Technically, this gate is designed for use solely in a hybrid environment, as the end result of a mechanical logic gear chain. If intended to be used completely as Fluid logic, the source would be converted to a power input, moved to the side of the pump instead of over the source tile, a hatch would be placed over the source tile, defaulting to closed when off.

Notes

A Rotation sensor can also be considered a simple Buffer. Buffers in actual electronics circuits are often used to increase the number of gates an output signal can be connected to, often by much more than the standard gate output can do. Thus, I consider mechanical logic and fluid logic to be two different types of gates, and you use the gate that is best suited for the specific job. Since fluid logic has a greater fan-out than mechanical logic, the fluid buffer can reset the power needed, since fundamentally, multiple mechanical gates can be connected together without issue until power runs out or you need to use load gear assemblies such as in an XOR or XNOR gate.

TODO

Verify that a signal gear or axle can be placed at (S) and still allow water to be pumped. If this is not possible, adjust the design to put the gear one z-level above the pump, making sure to channel the floor to allow power transfer. Construct and build a prototype and leave it run for a long time to verify the claim of no evaporation. Dwarf Science!

Pros/Cons

The pressure plate requires 100 steps to switch off, but switches on immediately. The sensor is water tight and should not evaporate under normal operation, allowing it to be disconnected from an infinite water source.

How It Works

When the source gear or axle is disabled, so will the pump be. In this state, the water level in the bottom reservoir will be a constant 7/7, thus disabling the pressure plate (set to 0-3). When the pump turns on, however, it pumps from the pressure plate tile constantly. Thus will shift the water in that tile to the rear reservoir in the top level, keeping the plate clear of water, thus triggering the plate. Since no tile of water will ever be less than 2/7 water at any time, no evaporation is possible (theoretically).

FL RAM

Random Access Memory, basic cell structure:

  PXXX       XXX
 H%>#D     . .. 
   XXX       XXX

XXXXXX    XXXXXX
Do<%HD        . 
XXXXXX    XXXXXX

   XXX       XXX
  MX D       X  
   XXX       XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grate (#) is there for completeness and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The top level hatch (H) is the RESET signal (R). The pressure plate (o) is set to detect only 7-7 water. The middle level hatch is the SET signal (S). The walls (X) can be carved from rock or constructed as needed. Power (P) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The output gear of the memory (M) can technically be placed wherever you need it to be.

Building

• The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead. If constructing, you can build a wall instead of a door on the bottom layer.
• Build all doors, forbidding the bottom most door, the top level hatch and grate and the pressure plate. Build the screw pump on the middle z-level.
• Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location the hatch goes in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
• Build the hatch on the middle layer.
• Link the pressure plate to the output gear (M). Link the SET and RESET hatches, remembering that the SET hatch turns the memory on, and the CLEAR hatch turns it off. Forbid the doors on the middle layer.
• Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the SET hatch are both covered in 7 water, then remove the pond designation.
• Forbid the door on the top layer, Connect to a power source that provides at least 20 + your connector, then stick a fork in it. It's done.

Bill of Materials

(Excluding power source gear or axle and hatch source links) 3-4 Doors 2 Hatch Covers 2 Corkscrews 2 Pipe Sections 2 Blocks 1 Grate 4 Mechanisms

Maintenance

You can adjust the connections of the hatches as well as the pressure plate as needed. Constructing some extra levers, even if on demand, will allow you to easily adjust things. If you build a water drainage system, you won't even have to worry about the excess water in the system when you open the hatch side of the middle layer. Just remember to refill the cell if you had to go in there.

Notes

This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.

Pros/Cons

The most important benefit of this design is the complete lack of evaporation, negating the need for an infinite water supply under routine operation. The water in this cell will never be at less than 3/7 if properly constructed. Not needing an infinite water supply means you can move this to a safely walled off portion of the map, preventing all building destroyers from infiltrating through it. It is also somewhat more compact within a z-level than other designs. Finally, the cell is, fundamentally, only two tiles wide, not considering power hookup. The walls can be shared with adjacent memory cells or other constructions. The drawbacks are twofold: it requires more power to operate, and it requires three z-levels.

How It Works

At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. Both hatches are initially closed. When the SET hatch gets its signal, it opens up and the constantly running pump pulls water from the main reservoir and puts it into the pressure plate cell. The plate triggers and the memory cell is effectively on, or 1. The SET signal can (and should) clear at this time, closing the hatch. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. Until, of course, the CLEAR hatch gets a signal. At this point the top pump will be able to pull the water out of the cell reservoir (If it was there when the signal was sent), returning the cell to its original state. The only state that has not been considered is when both hatches are open at once. When this occurs, the output of the pressure plate will be unknown at any given point. Water will be cycling constantly through the cell, and the cell will be, for all purposes, unusable. Obviously, this is a condition we want to avoid.

Electrical Similarities

This memory cell design is almost identical to a standard RS Flip-Flop circuit. The exceptions are that it only provides one output, and the SET and RESET signals are default HIGH (on) in the electrical version. The implementation is also somewhat different as well, but that is not particularly important.

FL RAM Byte (Including Power Supply)

An extension of the above, with an expanded Dwarven Water Reactor to provide power.

XDXDXDXDXDXDXDXDX
X#X#X#X#X#X#X#X#X
X^X^X^X^X^X^X^X^X *
 %-%-%-%-%-%-%-%--*
 H H H H H H H H

XDXDXDXDXDXDXDXDXXXXXXX
XHXHXHXHXHXHXHXHXW W WX
X%X%X%X%X%X%X%X%XW^W^WX
XvXvXvXvXvXvXvXvXW%W%W
XoXoXoXoXoXoXoXoX # #
XDXDXDXDXDXDXDXDX

XDXDXDXDXDXDXDXDXXXXXXX
X X X X X X X X X X X X
XXXXXXXXXXXXXXXXX X X X
 M M M M M M M MX X X X
                XX X XX
                 XXXXX

Notes

The Water Reactor used here will provide exactly 250 excess power. The memory cells themselves will cost 160, leaving 90 for the power train. The power train consists of two gears and 9 axle tiles, for 19 power, leaving 71 surplus power. The output gears are not considered part of the power train, as they will typically be used in other logic circuits, and will likely need more than 71 power to run whatever they are intended for. This leaves that power for other applications as needed.

Custom Mechanical Gates

In light of the fact that Gears are toggled, not set or unset, I am looking into the concept of more efficient designs for certain mechanical gates. The hope is that the excessive load gear trains for certain gates can be eliminated, providing upper boundaries on power usage, and making power source designs less complicated. For completeness I will also show the designs for unaffected gates. In the diagrams for Mechanical Logic gates, power sources and outputs may be gears, axles, or direct connections to a pump in the case of outputs. Sometimes it will be necessary for the power to be an extra gear. Power train and output train design are secondary and much simpler concerns. In the diagrams, capital letters indicate a normally constructed gear assembly, while miniscule letters indicate a gear assembly that is toggled once after construction with a lever.

WARNING!!!

I have NOT' yet tested these gates. The gates that require pre-toggled gears are theoretical at this point, though I intend to test them in the next day or so.

ML Buffer

Essentially this is an identity gate. It is the simplest ML gate possible, using at least one gear assembly to transfer power. It is, essentially, the reverse of the rotation sensor, taking a linked signal and converting it to P - 5 power.

PIO

Power is supplied (P), and if the input gear is functional (I), then the power, less 5 for the input gear, will be transferred to the output (O). Construction is simple, make the gear assembly and link to the signal.

ML Inverter (NOT)

This is similar to an identity gate. It is even constructed in a similar fashion, though you must also add a lever and pre-toggle the Input gear.

PiO

In all ML schematics, a lower case gear spot will indicate that it is pre toggled via a lever. Here, Power is supplied (P), and if the input gear is functional (i), then the power, less 5 for the input gear, is transferred to the output (O). Construction is simple, make the gear assembly and a lever. Link the gear assembly to the input signal, the lever to the gear, then flip the lever once. Optionally destroy the lever to recover two mechanisms.

ML AND Gate

Much like an ML Buffer gate. Two gears instead of one, and both must be active to function.

PABO

Power is supplied (P), and if both input gears are functional (A & B), then the power, less 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective signals.

Equivalence to a Tri-State Buffer

With mechanical logic, the ML AND gate is equivalent to a Tri-State Buffer. Namely, Mechanical Logic operates on the principle that a 0 value is the same as high impedance (no connection), while a 1 is a connection. Thus, the truth table for an AND gate and a Tri-State Buffer, when 0 = Z (electronics details left out), are identical. The Tri-State Buffer makes running a data bus possible.

ML Multi-Input AND Bar/Stack

The AND gate can be extended to multiple inputs by simply adding gears. All gears need to be active in order for power to transfer. Power cost will be the number of gears times 5 whenever the system is on.

ML OR Gate

Slightly more complex than the preceding ML gates, but still relatively easy. Again, there are two inputs. However, only one needs to be active for the result to be true.

PA
BO

Essentially, this is two separate identity paths from power to output. As long as the power is available, either one can provide the needed power to output. Power is supplied (P), and if either input gears are functional (A & B), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is simple, make the gear assemblies and link them to their respective inputs. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.

ML Multi-Input OR Bar/Stack

Depending on the number of inputs desired, a multi-input OR gate can be constructed in a bar (horizontal) or stack (vertical). For simplicity, I will diagram the bar method. Converting it to a stack merely involves rotating it to stand on end.

PPP
ABC

DEF
OOO

The top level consists of three power gears, each connected to the mechanical power source, and three different inputs. The bottom level consists of three more inputs, and three output gears, at least one of which must connect to a rotation sensor or the next logical gate in the line. The power cost of a large input OR Bar will be the cost of running each power and output gear, as well as the cost of from 1 to all of the input gears. A three input OR gate will require 7 mechanisms, 2 for power, 2 for output, and three input gears, and thus can cost anywhere from 25 to 35 power. Obviously, the maximum power that can ever be drawn from such a gate is the number of gears times 5.

ML NOR Gate

Taking advantage of the ability to pre-toggle gears, a simple NOR gate can be constructed with almost no difficulty.

PabO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less 10 for the gears, will be transferred to the output (O). Construction is mild, make the gear assemblies, construct two levers, link the levers to the gears, flip both levers, optionally dismantle the levers to recover mechanisms, then link the inputs to their sources. It works as a NOR gate because we invert the inputs.

ML NAND Gate

Again, taking advantage of the ability to pre-toggle gears, we can build a NAND gate without the need for a load gear train to overload power.

Pa
bO

Power is supplied (P), and if both input gears are functional (a & b), then the power, less up to 10 for the gears, will be transferred to the output (O). Construction is mild, following the same build order as for a NOR gate, though the layout is different. As with the NOR gate, it works because of the pre-toggled gears. Of particular importance is the fact that this gate can potentially be constructed one tile wide and two z-levels high, if the top layer is channeled out and the bottom layer is built first for safety reasons.

ML XOR Gate

XOR, or Exclusive OR, is much like an OR gate, except that it only activates when only one input is active.

P-A
| b
BaO

This operates on the principle that XOR = (A AND NOT B) OR (B AND NOT A). Because we can pre-toggle gears, we can input an implied NOT operation. The resulting AND and OR ops are simple copies from above. This gate requires a bit more space, but not nearly as much as would be needed if a drain load were used. If one is willing to have the design require more power and two z-levels, it can be built with two pathways on top of each other, taking advantage of the fact that power doesn't transfer from floor to floor without channeling.

From the side:

*Ab*
PaBO

Channels would only be present between the Power (P) and Output(O) tiles, and the tiles above them (or below if you swap layers). The inputs (A, B, a, & b) provide pathways from the power to the output. Depending on where the power source is, the power drain at any state will be in the range of 10 to 20 units of power. If the power source is designed to not be on the same z-level of the output, the power drain will always be 15 when the XOR function evals to true.

Variant

A variant suggested by Dorf3000 from the Forums gives this XOR gate, which costs less power to run but is slightly more complicated to link up.

PiO

The difference is that both the A & B inputs are linked up to the same single input gear. Testing will need to be done to determine if there are issues with a gear receiving two toggles at the same time frame; if so then this gear design will have the limitation that input signals cannot flip at the same time. Of particular note is that this option is far more power and space efficient than the previous design. Building is easy; build the input gear assembly, build a lever, link it to the gear, flip the lever, dismantle the lever if the mechanisms are desired, then link the inputs to the gear, ensuring the the input links are not active.

HL (Hybrid Logic) RAM

A Hybrid Logic Random Access Memory, basic cell structure:

 |
 *R         .

   XXX       XXX
 #%>#D     .  . 
   XXX       XXX

XXXXXX    XXXXXX
Do<%#D      . . 
XXXXXX    XXXXXX

 | XXX       XXX
 *sX D       X  
   XXX       XXX

Each door (D) is a simple access door for internal maintenance. Under normal circumstances, they should be forbidden entirely. The grates (#) are there for completeness, ability to build the lower pump, and safety when priming the cell with water. If desired it could be omitted. The pumps (%> and <%, pointing the direction of pumping, specifically, the % tile is walkable) are simple constructions, no special qualities. Make them of whatever material is available. The pressure plate (o) is set to detect only 7-7 water. The walls (X) can be carved from rock or constructed as needed. Power (|) is supplied through axles or gears. The cell draws 21 units of power when connected with an axle, 25 when using a gear. The set (s) gear and the reset (R) gear are both hooked up to the the data signal, though the set gear is pre-toggled. Write Enabling should be handled by application of power (more on this in further designs...); specifically, if power is enabled, the cell will write, if it isn't, it will only be reading.

Building

• The first step is to construct the walls and floor, or carve the same. If constructing, you should NOT build floors in the empty spaces (. on the right floor plan layout). If digging from solid rock, channel open space at those places instead, placing the first grate at the right most spot on the middle layer to make channeling safe and easy. If constructing, you can build a wall instead of a door on the bottom layer.
• Build all doors, forbidding the bottom most door, the remaining grates and the pressure plate. Build the screw pump on the middle z-level.
• Build the screw pump on the top z-level only after the first pump. Meanwhile, fill the bottom most tile with water by designating a pond on the location of the grate in the middle layer. Fill the bottom tile to 7 water, then remove the pond designation.
• Link the pressure plate to the output. Build and link the set and reset gears, build a lever to pre-toggle the reset gear, then dismantle the lever to reclaim two mechanisms. Forbid the doors on the middle layer.
• Fill the middle layer with water from the grate tile on the top layer, until the open spot of the pump and the grate on the middle layer are both covered in 7 water, then remove the pond designation and forbid the top door.
• Build the power linkage.

Bill of Materials

(Excluding power source gear or axle and data source links) 3-4 Doors 2 Corkscrews 2 Pipe Sections 2 Blocks 3 Grates 6 Mechanisms

Maintenance

You can adjust the connections of the gears as well as the pressure plate as needed. The pressure plate is the only potentially submerged location in the cell, so pre-clearing the cell before maintenance is a good idea.

Notes

This cell does not have any "circuitry" to disable or enable the output of the cell based on addressing concerns, so if you add this to an addressable memory system, that gearing will be needed. It should be, simply, an addition of another gear before a rotation sensor.

Pros/Cons

Similar to the FL RAM cell, but without the race condition from setting and resetting at the same time. Just as fast and water efficient as the FL RAM cell, as well as being easier to maintain if it is discovered that gears were incorrectly built or linked.

How It Works

At its starting state, the pressure plate tile has no water, and thus the output of the cell is off, or 0. The set gear is pre-toggled. When the set/reset gears get their signal, the flip semantics, causing the set to be enabled and the reset to turn off. This causes the middle pump to run, filling the cell reservoir to 7/7, while the top pump is off, leaving the cell reservoir filled. The plate triggers and the memory cell is effectively on, or 1. Power to both pumps can drop at this time and the output remains the same. The rear reservoir now contains 7/7 at the lowest tile, and 3/7 and 4/7 fluctuating in the second layer, over the hatch and the walkable portion of the pump. The water in the cell reservoir cannot drain, and will not be pumped out. If power remains and the data signal toggles again, the set/reset gears will swap again, causing the cell to empty, and triggering the pressure plate off after 100-steps. Again, if power is lost after the cell is emptied, the memory will still read out without problems. If the set/reset gears toggle while power is out, no change occurs. This allows Power to be an effective Write enable signal. The exact order of data signal change followed by write enable is not crucial, as long as both occur at the same time to cause a write to the cell.

Electrical Similarities

This memory cell design is almost identical to a standard D Flip-Flop circuit. The differences are similar to the FL RAM cell and an RS Flip-Flop.

DPROM

Dwarf Programmable Read Only Memory, is quite simple. It is a lever. Its special nature comes when a bank of 8 are hooked up to a data bus like any other pressure plate and addressing scheme. (More on that later)

Data Bus

The data bus in a computing system needs a way to select one device on the bus to write to the bus, while all other portions of the bus are allowed to read from the bus. In Mechanical Logic, this isn't particularly feasible, since power limitations are very likely. Instead a data bus will benefit from having both a device writer select and a device reader select signal set. Depending on the number of devices allowed on the bus, this may be multiple communication channels (axles). A connection spot to the bus will be a row of gears, specifically, 8 bits of data, however many bits of addressing are required by the bus, and perhaps a power supply. It is my belief that power should be supplied conditionally to devices on the bus, if only to limit the number of Dwarven Water Reactor Systems are needed by a computer, or whatever other method of powering is chosen. Thus, a device should operate on the assumption that if it is not selected as the Write or Read target, it should shut off. A minimal standby power supply will also be needed to allow activation of a device in the first place. I have more research to do in the design of a data bus, and some decisions to make regarding whether CPU internals should be part of the main system bus or simply hardwired within the CPU itself.